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参数资料
| 型号： | PH28F128W18BD60A |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | 8M X 16 FLASH 1.8V PROM, 60 ns, PBGA56 |
| 封装： | 9 X 11 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-56 |
| 文件页数： | 84/106页 |
| 文件大小： | 1496K |
| 代理商： | PH28F128W18BD60A |
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Intel
Wireless Flash Memory (W18)
Datasheet
Intel Wireless Flash Memory (W18)
07-Dec-2005
Order Number: 290701, Revision: 015
79
Down command should be issued prior asserting WP# will put that block back to the locked-down
state. When WP# is deasserted, locked-down blocks are changed to the locked state and can then
be unlocked by the Unlock Block command.
13.1.4
Block Lock Status
Every block’s lock status can be read in read identifier mode. To enter this mode, issue the Read
Identifier command to the device. Subsequent reads at BBA + 02h will output that block’s lock
status. For example, to read the block lock status of block 10, the address sent to the device should
be 50002h (for a top-parameter device). The lowest two data bits of the read data, DQ1 and DQ0,
represent the lock status. DQ0 indicates the block lock status. It is set by the Lock Block command
and cleared by the Block Unlock command. It is also set when entering the lock-down state. DQ1
indicates lock-down status and is set by the Lock-Down command. The lock-down status bit
cannot be cleared by software–only by device reset or power-down. See Table 25.
13.1.5
Lock During Erase Suspend
Block lock configurations can be performed during an erase suspend operation by using the
standard locking command sequences to unlock, lock, or lock-down a block. This feature is useful
when another block requires immediate updating.
To change block locking during an erase operation, first write the Erase Suspend command. After
checking SR[6] to determine the erase operation has suspended, write the desired lock command
sequence to a block; the lock status will be changed. After completing lock, unlock, read, or
program operations, resume the erase operation with the Erase Resume command (D0h).
If a block is locked or locked-down during a suspended erase of the same block, the locking status
bits change immediately. When the erase operation is resumed, it will complete normally.
Locking operations cannot occur during program suspend. Appendix A, “Write State Machine
States” on page 93 shows valid commands during erase suspend.
13.1.6
Status Register Error Checking
Using nested locking or program command sequences during erase suspend can introduce
ambiguity into Status Register results.
Because locking changes require 2-cycle command sequences, for example, 60h followed by 01h
to lock a block, following the Configuration Setup command (60h) with an invalid command
produces a command sequence error (SR[5:4]=11b). If a Lock Block command error occurs during
erase suspend, the device sets SR[4] and SR[5] to 1 even after the erase is resumed. When erase is
Table 25.
Write Protection Truth Table
VPP
WP#
RST#
Write Protection
XX
VIL
Device inaccessible
VIL
XVIH
Word program and block erase prohibited
XVIL
VIH
All lock-down blocks locked
XVIH
VIH
All lock-down blocks can be unlocked
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