GT-96100A Advanced Communication Controller
198
Revision 1.0
7.14.3
Function 1 Configuration Registers
The GT-96100A acts as two function device. It’s PCI slave interface responds to configuration transactions to
function number 0 or 1. Most of function 1 configuration registers are aliased to function 0 registers or reserved,
except of the 3 swap BARs. To access any of the Swap Base Address registers, a configuration access addressed
to function 1must be used with the appropriate offset. If an offset other than 0x010, 0x014, or 0x01c is accessed
when specifying function 1, the transaction accesses the corresponding offset register in function 0. Configura-
tion transactions to any other function number are ignored.
The GT-96100A acts as two function device regardless of multi-function bit (bit[7] in Header Type). However,
this bit value after reset is 0. In a PC environment, in order for a BIOS to recognize the GT-96100A as a multi-
function device (if swap BARs are required in the system), set this bit and enable the swap BARs (Base Address
Enable register) before BIOS starts. This can be done by programing by CPU software or by using the GT-
96100A’s Auto-Load option.
Table 203: Function1 PCI_0 Swapped SCS[1:0]* Base Address,
Offset: 0x110 from PCI_0 or CPU; 0x190 from PCI_1
Bits
F ield Name
Fu nction
Initial Value
0
MemSpace
Memory Space Indicator
Read only.
0x0
2:1
Type
Read only.
0x0
3
Prefetch
0x1
11:4
Reserved
Read only.
0x0
31:12
Base
Defines the address assignment of
Swapped SCS[1:0]*.
Reserved if this BAR is disabled through
PCI_0 Base Address registers’ enable
setting.
0x0
Table 204: Function 1 PCI_1 Swapped SCS[1:0]* Base Address,
Offset: 0x190 from PCI_0 or CPU; 0x110 from PCI_1
Bits
F ield Name
Fu nction
Initial Value
31:0
Various
Same as for PCI_0 Swapped SCS[1:0]*
Base Address
0x08
Table 205: Function 1 PCI_0 Swapped SCS[3:2]* Base Address,
Offset: 0x114 from PCI_0 or CPU; 0x194 from PCI_1
Bits
F ield Name
Fu nction
Initial Value
0
MemSpace
Memory Space Indicator
Read only.
0x0