GT-96100A Advanced Communication Controller
Revision 1.0
331
15:14
TSNS
Transmit Sense.
Defines the number of bit times the internal sense signal will stay active after
last transition on the RXD line occurs. It is useful for AppleTalk protocol to
avoid the spurious CD* change interrupt that would otherwise occur during
the frame synchronization sequence that precedes the opening flag. The
delay is a function of RCDV (clock divider) setting.
00 (RCDV = 0) - Infinite (Carrier Sense is always active - default)
00 (RCDV
≠ 0) - Infinite (Carrier Sense is always active - default)
01 (RCDV = 0) - 14 bit times
01 (RCDV
≠ 0) - 6.5 bit times
10 (RCDV = 0) - 4 bit times (normal AppleTalk)
10 (RCDV
≠0) - 2.5 bit times (normal AppleTalk)
11 (RCDV = 0) - 3 bit times
11 (RCDV
≠ 0) - 1 bit time
0
16
TIDL
Transmit Idles
0 - TxD is encoded during data transmission (including preamble and flags/
sync patterns). TxD is in MARK during idle. (Default.)
1 - TxD is encoded all the time, even when idles are transmitted.
0
17
RTSM
RTS* Mode
This bit may be changed on the fly.
0 - Send IDLE between frames. RTS* is negated between frames. IDLE pat-
tern is defined by the protocol and TIDL bit.
1- Send flags/syncs between frames according to the protocol. RTS* is
always asserted. Refer to
0
18
Reserved.
0
19
CTSS
CTS* Sampling Mode
0 - Asynchronous CTS*. CTS* is synchronized inside the GT-96100A. Trans-
mission starts after synchronization is achieved with a few cycles delay to the
external CTS*. (Default)
1 - Synchronous CTS*. CTS* is synchronized to the Rx clock. This mode is
recommended when connecting an MPSC to a FlexTDM.
NOTE: Synchronous CTS* must be used for ISDN D channels.
0
20
CDS
CD* Sampling mode
0 - Asynchronous CD*. CD* is synchronized internally in the GT-96100A and
then data is received. (Default)
1 - Synchronous CD*. CD* is synchronized to the Rx clock. This mode is rec-
ommended when connecting an MPSC to a Flex-TDM.
0
Table 322: MPSCx Main Configuration Register Low (MMCRLx), Offset: 0x000A00, 0x008A00,
0x010A00, 0x018A00, 0x020A00, 0x028A00, 0x030A00, 0x038A00
(where x is the port number 0 to 7)
(Continued)
Bits
Field
Name
F unctio n
In itial
Valu e