
GT-96100A Advanced Communication Controller
368
Revision 1.0
When the UART is in RZS=0 mode after receiving a break sequence, the descriptor is closed with BR bit (bit 9)
set. In addition, a “break descriptor” also has the FE bit (bit 3) set and, if in odd parity, the PE bit (bit 0) is also
set.
When the UART in RZS=1 mode, two consecutive break sequences are needed for proper break recognition. The
first break character is not recognized. Instead, the UART receiver closes the descriptor with the FE bit (bit 3) set
and, if in odd parity, the PE bit (bit 0) will also be set. The second break will be recognized as a break and a
descriptor will be closed with the BR bit (bit 9) set. In addition, a “break descriptor” will also have the FE bit (bit
3) set and, if in odd parity, the PE bit (bit 0) will also be set.
14.7.5.2 CHR2 - Command Register (CR)
Table 348: CHxR2 - Command Register (CR), Offset: 0x000A10, 0x008A10, 0x010A10,
0x018A10, 0x020A10, 0x028A10, 0x030A10, 0x038A10 (where x is channel 0 and 7)
Bits
Field
Name
Fun ction
In itial
Valu e
0
Reserved.
0
1
TEV
Tx Enable Vertical Redundancy Check
0 - VRC (parity) is disabled.
1 - VRC is enabled.
0
3:2
TPM
Transmit Parity Mode
00 - Odd
01 - Low (always 0)
10 - Even
11 - High (always 1)
0
6:4
Reserved.
0
7
A
Transmit Abort
Aborts the transmission immediately (on byte boundaries) and goes to
IDLE. The descriptor is not closed or incremented.
After receiving an abort command, the GT-96100A halts the transmit pro-
cess and starts sending a break sequence according to the BRK field in
CHR1.
NOTE: Command is not synchronized to byte.
0
8
Reserved.
0
9
TCS
Transmit TCS Character.
The TCS character is transmitted after the current transmitted character.
The transmitter then continues with the normal Tx sequence.
The TCS command can be used to send out of band characters such as
XOFF and XON.
0
16:10
Reserved.
0
17
REV
Rx Enable Vertical Redundancy Check
0 - VRC (parity) is disabled.
1 - VRC is enabled.
0