GT-96100A Advanced Communication Controller
388
Revision 1.0
15.6.2
IOM-2-TE Frames
An IOM-2-TE frame consists of three IOM channels (channels 0,1,2).
The C/I channel of the third sub-frame (i.e. IOM channel 2) is used for TIC bus applications. The TIC bus is used
by the PHY device to grant D channel access. Usually, bit 4 of C/I channel 2 is used as the D channel request/
grant bit. However, this is programmable in the GT-96100A and it is possible to specify any desired bit as the
request/grant bit.
The GT-96100A fully supports IOM-2-TE frames. In IOM-2-TE mode, the GT-96100A handles the D channel
REQ/GNT protocol by itself. The GT-96100A accesses the D channel only when the received Dgrant bit is
asserted low. The GT-96100A drives the Dreq bit to ‘0’ when sending data over the D channel. Otherwise, it
drives the value programed in MASK[1:0] bits (see
Table 356 for more information).
15.6.3
IOM-2-LC Frames
The IOM-2 line card frame is used to connect up to eight ISDN devices on the same card. An IOM-2-LC frame
consists of eight IOM channels.
The GT-96100A can be programmed to access any one of the IOM channels. The monitor and C/I channels refer
to the selected IOM channel. However, other MPSCs can be used to access other time slots in the IOM-2-LC
frame.
15.7
PCM Highway Mode
This is a free programming mode where each MPSC can be connected to any time slot in the programed frame.
15.8
Data Rate Adoption
Since it is capable of accessing each bit of the serial TDM stream separately, the FlexTDM supports data rate
adoption.
The FlexTDM DPRAM allows programmable routing of each bit (or byte) in the data to any of the MPSCs and
supports masking of bits which are to be ignored. The clock pulse associated with a masked bit is “stolen” from
the MPSC (or AUX channel). Thus, the serial controller is clocked at an effective rate that is appropriate for the
logical data stream.
15.9
FlexTDM Auxiliary Channels A and B
The auxiliary channels were designed to support the IOM-2 monitor and C/I channels. These are simple channels
accessible by reading and writing 8 bit registers.