GT-96100A Advanced Communication Controller
402
Revision 1.0
17.2
Watchdog Operation
After reset, the watchdog is disabled.
The watchdog must be serviced periodically in order to avoid NMI or reset (WDE*). Watchdog service is per-
formed by writing ‘01’ to CTL2, followed by writing ‘10’ to CTL2. Upon watchdog service, the GT-96100A
clears the NMI and WDE bits (if set) and reloads the Preset_VAL into the watchdog counter.
A write sequence of ‘01’ followed by ‘10’ into CTL1 disables/enables the watchdog. The watchdog’s current sta-
tus can be read in bit 31 of WDC. When disabled, the GT-96100A sets the NMI and WDE bits (if clear) and
reloads the Preset_VAL into the watchdog counter.
Preset_VAL and NMI_VAL can be changed while the watchdog is enabled. However, Preset_VAL will affect the
watchdog only after it is loaded into the watchdog counter (e.g. after watchdog service).
If the watchdog is not serviced before the counter reaches NMI_VAL, a non-maskable interrupt event occurs. a
watchdog expiration event occurs. The NMI bit is reset, asserting low the NMI* pin.
In order to deassert the NMI* and/or WDE* pins, the watchdog must be serviced, disabled or the GT-96100A
must be reset. The GT-96100A holds WDE* asserted for the duration of 16 system cycles after reset assertion.
30
WDE
Watchdog Expiration
When the watchdog counter expires, this bit is asserted. The WDE*
pin can be used to reset the entire system.
This bit is read only.
1
31
EN
Enable
0 - Watchdog is disabled, counter is loaded with Preset_VAL. NMI
and WDE are set to ‘1’.
1 - Watchdog is enabled.
This bit is read only.
0
Table 367: Watchdog Value register (WDV), Offset: 0x101A84
Bits
Field
Name
Fu nction
Reset
Valu e
23:0
NMI_VAL
NMI_VAL are the 24 least significant bits of a 32-bit value. The
upper 8 bits are always ‘00’.
When the Watchdog counter reaches a value equal to the NMI value
NMI* pin is asserted. The actual NMI value is a 32-bit number equal
to {0x00,NMI_VAL}.
0x000.0000
31:24
Reserved.
0
Table 366: Watchdog Configuration register (WDC), Offset: 0x101A80 (Continued)
Bits
Field
Name
Fun ction
In itial
Valu e