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参数资料
| 型号： | YF80528KC017512 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1400 MHz, MICROPROCESSOR, CPGA603 |
| 封装： | MICRO, PGA-603 |
| 文件页数： | 28/116页 |
| 文件大小： | 2277K |
| 代理商： | YF80528KC017512 |
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Intel XeonTM Processor MP
Datasheet
19
NOTES:
1. These multipliers are supported on C stepping processors.
2. Refer to the Intel
XeonTM Processor MP Specification Update for processor stepping details.
2.4.3
Mixing Processors
Mixing processors operating at different internal clock frequencies is not supported and has not
been validated by Intel. Not all operating systems can support multiple processors with mixed
frequencies. Intel does not support or validate operation of processors with different cache sizes.
Intel only supports and validates multi-processor configurations where all processors operate with
the same system bus, core frequencies, VID settings, and have the same internal cache sizes.
Mixing processors of different steppings but the same model (as per CPUID instruction) is
supported. Details on CPUID are provided in the IA32 Architecture Software Developer’s Manual
and the Intel Processor Identification and the CPUID Instruction application note.
2.5
Voltage Identification
The VID specification for Intel Xeon processor MP is different from that of previous generations
and is supported by the VRM 9.1 DC-DC Convertor Design Guidelines. The voltage set by the VID
pins is the maximum voltage allowed by the processor. A minimum voltage is provided in Table 6
and changes with frequency. This allows processors running at a higher frequency to have a relaxed
minimum voltage specification. The specifications have been set such that one voltage regulator
can work with all supported frequencies.
The processor uses five voltage identification pins, VID[4:0], to support automatic selection of
power supply voltages. Table 3 specifies the voltage level corresponding to the state of VID[4:0]. A
‘1’ in this table refers to a high voltage and a ‘0’ refers to low voltage level. The definition
Table 2.
Core Frequency to System Bus Multiplier Configuration
Multiplier for System Bus-
to-Core Frequency
Core Frequency
LINT[1]/
NMI
A20M#
IGNNE#
LINT[0]/
INTR
Notes 2
1/8
800 MHz
H
HHH
1/9
900 MHz
H
L
1/23
2.30 GHz
H
L
1/10
1.00 GHz
H
L
H
1/11
1.10 GHz
H
L
1/12
1.20 GHz
H
L
H
1/13
1.30 GHz
H
L
H
L
1/14
1.40 GHz
H
L
H
1
1/15
1.50 GHz
H
L
1
1/16
1.60 GHz
L
H
1
1/17
1.70 GHz
L
H
L
1/18
1.80 GHz
L
H
L
H
1/19
1.90 GHz
L
H
L
1/20
2.00 GHz
L
H
1/21
2.10 GHz
L
H
L
1/22
2.20 GHz
L
H
1/24
2.40 GHz
L
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