Intel XeonTM Processor MP
Datasheet
27
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies and cache sizes.
2. V
IL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low value.
3. V
IH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high value.
4. V
IH and VOH may experience excursions above V
CC. However, input signal drivers must comply with the signal quality
5. Refer to Intel Xeon Processor Signal Integrity Models for I/V characteristics.
6. The VCC referred to in these specifications refers to instantaneous VCC.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies and cache sizes.
2. All outputs are open drain.
3. TAP signal group must meet system signal quality specifications in
Chapter 3.0.
4. Refer to the Intel
XeonTM Processor Signal Integrity Models for I/V characteristics.
5. The VCC referred to in these specifications refers to instantaneous VCC.
6. The maximum output current is based on maximum current handling capability of the buffer and is not specified into the
test load.
7. VOL_MAX of 360 mV is guaranteed when driving into a test load as depicted in Figure 3. 8. VHYS represents the amount of hysteresis, nominally centered about 0.5 * VCC, for all TAP inputs.
Table 8.
AGTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1
VIL
Input Low Voltage
-0.150
GTLREF - 0.100
V
2, 6
VIH
Input High Voltage
GTLREF + 0.100
VCC
V3, 4, 6
VOL
Output Low Voltage
-0.150
VCC *RON_MAX/
(RON_MAX + 0.50*RTT_MIN)
V6
VOH
Output High Voltage
GTLREF + 0.100
VCC
V4, 6
IOL
Output Low Current
N/A
VCC /
(0.50*RTT_MIN +RON_MIN)
mA
6
ILI
Input Leakage Current
N/A
± 100
A
ILO
Output Leakage Current
N/A
± 100
A
RON
Buffer On Resistance
5
11
5
Table 9.
TAP Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1,2
VHYS
TAP Input Hysteresis
200
300
mV
8
VT+
TAP Input Low to High
Threshold Voltage
0.5*(VCC +VHYS_MIN)0.5 * (VCC +VHYS_MAX)V
5
VT-
TAP Input High to Low
Threshold Voltage
0.5*(VCC -VHYS_MAX)
0.5*(VCC -VHYS_MIN)V
5
VOH
Output High Voltage
N/A
VCC
V3, 5
IOL
Output Low Current
45
mA
6, 7
ILI
Input Leakage Current
± 100
A
ILO
Output Leakage Current
± 100
A
RON
Buffer On Resistance
6.25
13.25
4