Intel XeonTM Processor MP
Datasheet
105
The thermal sensor internally decodes one of three upper address patterns from the bus of the form
“0011XXXZb”, “1001XXXZb”, or “0101XXXZb”. The device’s addressing, as implemented, uses
the SM_TS_A[1:0] pins in either the HI, LO, or Hi-Z state. Therefore, the thermal sensor supports
nine unique addresses. To set either pin for the Hi-Z state, the pin must be left floating. As before,
the “Z” bit is the read/write bit for the serial transaction.
Note that addresses of the form “0000XXXXb” are Reserved and should not be generated by an
SMBus master. The thermal sensor samples and latches the SM_TS_A[1:0] signals at power-up
and at the starting point of every conversion. System designers should ensure that these signals are
at valid input levels before the thermal sensor powers up. This should be done by pulling the pins to
SM_VCC or V
SS viaa1 K or smaller resistor, or leaving the pins floating to achieve the Hi-Z
state. If the designer desires to drive the SM_TS_A[1:0] pins with logic, the designer must ensure
that the pins are at input levels of 3.3V or 0V before SM_VCC begins to ramp. The system
designer must also ensure that their particular implementation does not add excessive capacitance
to the address inputs. Excess capacitance at the address inputs may cause address recognition
problems. Refer to the appropriate platform design guidelines document and the SMBus and I2C
Bus Design Guide application note.
describe the address pin connections and how they affect the addressing of the devices.
Table 49. Thermal Sensor SMBus Addressing
NOTES:
1. Upper address bits are decoded in conjunction with the select pins.
2. A tri-state or “Z” state on this pin is achieved by leaving this pin unconnected.
Note:
System management software must be aware of the processor dependent addresses for the thermal
sensor.
Address (Hex)
Upper Address1
Device Select
8-bit Address Word on Serial Bus
SM_TS_A1
SM_TS_A0
b[7:0]
3Xh
0011
0
Z2
1
0
0011000Xb
0011001Xb
0011010Xb
5Xh
0101
0
Z2
1
Z2
0101001Xb
0101010Xb
0101011Xb
9Xh
1001
0
Z2
1
1001100Xb
1001101Xb
1001110Xb