Intel XeonTM Processor MP
Datasheet
103
will clear any alarm bits that may have been set, unless the alarm condition persists. If the
SM_ALERT# signal is enabled via the Thermal Sensor Configuration Register and a thermal diode
threshold is exceeded, an alert will be sent to the platform via the SM_ALERT# signal.
This register is read by accessing the RS Command Register.
Table 46. SMBus Thermal Sensor Status Register
7.4.6.4
Configuration Register
The Configuration Register controls the operating mode (stand-by vs. auto-convert) of the SMBus
thermal sensor.
Table 47 shows the format of the Configuration Register. If the RUN/STOP bit is
set (high) then the thermal sensor immediately stops converting and enters stand-by mode. The
thermal sensor will still perform analog to digital conversions in stand-by mode when it receives a
one-shot command. If the RUN/STOP bit is clear (low) then the thermal sensor enters auto-
conversion mode.
This register is accessed by using the thermal sensor Command Register: The RC command
register is used for read commands and the WC command register is used for write commands. See
Table 47. SMBus Thermal Sensor Configuration Register
Bit
Name
Reset State
Function
7 (MSB)
BUSY
N/A
If set, indicates that the device’s analog to digital converter is busy.
6
RESERVED
Reserved for future use
5
RESERVED
Reserved for future use
4
RHIGH
0
If set, indicates the processor core thermal diode high temperature
alarm has activated.
3RLOW
0
If set, indicates the processor core thermal diode low temperature
alarm has activated.
2OPEN
0
If set, indicates an open fault in the connection to the processor core
diode.
1
RESERVED
Reserved for future use.
0 (LSB)
RESERVED
Reserved for future use.
Bit
Name
Reset State
Function
7 (MSB)
MASK
0
Mask SM_ALERT# bit. Clear the bit to allow interrupts via
SM_ALERT# and allow the thermal sensor to respond to the ARA
commandwhenanalarm is active. Set the bittodisable interrupt
mode. The bit is not used to clear the state of the SM_ALERT# output.
An ARA command may not be recognized if the mask is enabled.
6
RUN/STOP
0
Stand-by mode control bit. If set, the device immediately stops
converting, and enters stand-by mode. If cleared, the device converts
in either one-shot mode or automatically updates on a timed basis.
5:0
RESERVED
Reserved for future use.