
Intel XeonTM Processor MP
Datasheet
101
Table 42. Receive Byte SMBus Packet
Table 43. ARA SMBus Packet
NOTE
:
1. This is an 8-bit field. The device which sent the alert will respond to the ARA Packet with its address in the seven most significant bits. The
least significant bit is undefined and may return as a ‘1’ or ‘0’. See
Section 7.4.8 for details on the Thermal Sensor Device addressing.
Table 44. SMBus Thermal Sensor Command Byte Bit Assignments
All of the commands in
Table 44 are for reading or writing registers in the SMBus thermal sensor,
except the one-shot command (OSHT) register. The one-shot command forces the immediate start
of a new conversion cycle. If a conversion is in progress when the one-shot command is received,
then the command is ignored. If the thermal sensor is in stand-by mode when the one-shot
command is received, a conversion is performed and the sensor returns to stand-by mode. The one-
shot command is not supported when the thermal sensor is in auto-convert mode.
S
Slave Address
Read
Ack
Data
///
P
17-bits
1
8-bits
1
S
ARA
Read
Ack
Address
///
P
1
0001 100
1
Device Address1
11
Register
Command
Reset State
Function
RESERVED
00h
RESERVED
Reserved for future use
TRR
01h
0000 0000
Read processor core thermal diode
RS
02h
N/A
Read status byte (flags, busy signal)
RC
03h
00XX XXXX
Read configuration byte
RCR
04h
0000 0010
Read conversion rate byte
RESERVED
05h
RESERVED
Reserved for future use
RESERVED
06h
RESERVED
Reserved for future use
RRHL
07h
0111 1111
Read processor core thermal diode THIGH limit
RRLL
08h
1100 1001
Read processor core thermal diode TLOW limit
WC
09h
N/A
Write configuration byte
WCR
0Ah
N/A
Write conversion rate byte
RESERVED
0Bh
RESERVED
Reserved for future use
RESERVED
0Ch
RESERVED
Reserved for future use
WRHL
0Dh
N/A
Write processor core thermal diode THIGH limit
WRLL
0Eh
N/A
Write processor core thermal diode TLOW limit
OSHT
0Fh
N/A
One shot command (use send byte packet)
RESERVED
10h – FFh
N/A
Reserved for future use