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MOTOROLA
MC68330 USER’S MANUAL
6-3
To ensure proper operation, the open-drain pins require external pullups. Twenty-one
bits in the boundary scan register define the output enable signal for associated groups
of bidirectional and three-state pins. The 21 control bits and their bit positions are listed
in Table 6-1.
Table 6-1. Boundary Scan Control Bits
Name
Bit Number
Name
Bit Number
Name
Bit Number
cs0.ctl
4
a27.ctl
68
irq7.ctl
95
ifetch.ctl
34
a26.ctl
70
irq6.ctl
97
modck.ctl
39
a25.ctl
72
irq5.ctl
99
a31.ctl
60
a24.ctl
74
irq4.ctl
101
a30.ctl
62
ab.ctl
78
irq3.ctl
103
a29.ctl
64
berr.ctl
79
irq2.ctl
105
a28.ctl
66
db.ctl
80
irq1.ctl
107
Boundary scan bit definitions are shown in Table 6-2. The first column in Table 6-2
defines the bit's ordinal position in the boundary scan register. The shift register cell
nearest TDO (i.e., first to be shifted out) is defined as bit zero; the last bit to be shifted out
is 107.
The second column references one of the five MC68330 cell types depicted in Figures 6-
2 – 6-6, which describe the cell structure for that bit.
The third column lists the pin name for all pin-related cells or defines the name of
bidirectional control register bits. The active level of the control bits (i.e., output driver on)
is defined by the last digit of the cell type listed for each control bit. For example, the
active-high level for ab.ctl (bit 78) is logic one since the cell type is IO.Ctl1. The active
level for cs0.ctl (bit 4) is logic zero, since the cell type is IO.Ctl0. IO.Ctl0 (see Figure 6-5)
differs from IO.Ctl1 (see Figure 6-4) by an inverter in the output enable path.
The fourth column lists the pin type: TS-Output indicates a three-state output pin, I/O
indicates a bidirectional pin, and OD-I/O denotes an open-drain bidirectional pin. An
open-drain output pin has two states: off (high impedance) and logic zero.
The last column indicates the associated boundary scan register control bit for
bidirectional and three-state pins.
Bidirectional pins include a single scan cell for data (IO.Cell) as depicted in Figure 6-6.
These cells are controlled by one of the two cells shown in Figures 6-4 and 6-5. One or
more bidirectional data cells can be serially connected to a control cell as shown in
Figure 6-7. Note that, when sampling the bidirectional data cells, the cell data can be
interpreted only after examining the IO control cell to determine pin direction.