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MC68330 USER’S MANUAL
MOTOROLA
TABLE OF CONTENTS (Continued)
Paragraph
Page
Number
Title
Number
5.7.2.8.6
Read System Register (RSREG)................................................................. 5-98
5.7.2.8.7
Write System Register (WSREG)................................................................ 5-99
5.7.2.8.8
Read Memory Location (READ)................................................................5-100
5.7.2.8.9
Write Memory Location (WRITE)...............................................................5-100
5.7.2.8.10
Dump Memory Block (DUMP) ...................................................................5-102
5.7.2.8.11
Fill Memory Block (FILL).............................................................................5-103
5.7.2.8.12
Resume Execution (GO).............................................................................5-104
5.7.2.8.13
Call User Code (CALL)...............................................................................5-105
5.7.2.8.14
Reset Peripherals (RST)............................................................................. 5-107
5.7.2.8.15
No Operation (NOP)....................................................................................5-107
5.7.2.8.16
Future Commands.......................................................................................5-108
5.7.3
Deterministic Opcode Tracking .................................................................5-108
5.7.3.1
Instruction Fetch (
IFETCH).........................................................................5-108
5.7.3.2
Instruction PIPE (
IPIPE) .............................................................................5-108
5.7.3.3
Opcode Tracking during Loop Mode .......................................................5-110
5.8
Instruction Execution Timing......................................................................5-110
5.8.1
Resource Scheduling .................................................................................5-110
5.8.1.1
Microsequencer ...........................................................................................5-110
5.8.1.2
Instruction Pipeline......................................................................................5-110
5.8.1.3
Bus Controller Resources ..........................................................................5-111
5.8.1.3.1
Prefetch Controller.......................................................................................5-112
5.8.1.3.2
Write-Pending Buffer...................................................................................5-112
5.8.1.3.3
Microbus Controller.....................................................................................5-112
5.8.1.4
Instruction Execution Overlap.................................................................... 5-112
5.8.1.5
Effects of Wait States...................................................................................5-113
5.8.1.6
Instruction Execution Time Calculation ...................................................5-114
5.8.1.7
Effects of Negative Tails .............................................................................5-115
5.8.2
Instruction Stream Timing Example .........................................................5-116
5.8.2.1
Timing Example 1: Execution Overlap.....................................................5-116
5.8.2.2
Timing Example 2: Branch Instructions ...................................................5-116
5.8.2.3
Timing Example 3: Negative Tails............................................................5-117
5.8.3
Instruction Timing Tables ...........................................................................5-118
5.8.3.1
Fetch Effective Address ..............................................................................5-120
5.8.3.2
Calculate Effective Address.......................................................................5-122
5.8.3.3
MOVE Instruction .........................................................................................5-123
5.8.3.4
Special-Purpose MOVE Instruction.......................................................... 5-124
5.8.3.5
Arithmetic/Logical Instructions...................................................................5-125
5.8.3.6
Immediate Arithmetic/Logical Instructions...............................................5-126
5.8.3.7
Binary-Coded Decimal and Extended Instructions ...............................5-127
5.8.3.8
Single Operand Instructions ......................................................................5-127
5.8.3.9
Shift/Rotate Instructions..............................................................................5-128
5.8.3.10
Bit Manipulation Instructions......................................................................5-129
5.8.3.11
Conditional Branch Instructions................................................................5-129
5.8.3.12
Control Instructions......................................................................................5-130