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4-12
MC68330 USER'S MANUAL
MOTOROLA
Table 4-3. Clock Control Signals
Control Bits
Clock Outputs
STSIM
STEXT
SIMCLK
CLKOUT
0
EXTAL
Off
0
1
EXTAL
1
0
VCO
Off
1
VCO
NOTE: SIMCLK runs the periodic interrupt
RESET and IRQx pin synchronizers
in LPSTOP mode.
4.2.4 Chip-Select Function
Typical microprocessor systems require external hardware to provide select signals to
external memory and peripherals. This device integrates these functions on-chip to
provide the cost, speed, and reliability benefits of a higher level of integration. The chip-
select function contains register pairs for each external chip-select signal. The pair
consists of a base address register and an address mask register that define the
characteristics of a single chip select. The register pair provides flexibility for a wide
variety of chip-select functions.
4.2.4.1
PROGRAMMABLE
FEATURES. The chip-select function supports the
following programmable features:
Four Programmable Chip-Select Circuits
All four chip-select circuits are independently programmable from the same list of
selectable features. Each chip-select circuit has an individual base address
register and address mask register that contain the programmed characteristics of
that chip select. The base address register selects the starting address for the
address block in 256-byte increments. The address mask register specifies the
size of the address block range. The valid (V) bit of the base address register
indicates that the register information for that chip select is valid. A global chip
select allows address decode for a boot ROM before system initialization occurs.
Variable Block Sizes
The block size, starting from the specified base address, can vary in size from 256
bytes up to 4 Gbytes in 2n increments. This size is specified in the address mask
register.
Both 8- and 16-Bit Ports Supported
The 8-bit ports are accessible on both odd and even addresses when connected
to data bus bits 15–8; the 16-bit ports can be accessed as odd bytes, even bytes,
or even words. The port size is specified by the PS bits in the address mask
register.
Write Protect Capability
The WP bit in each base address register can restrict write access to its range of
addresses.
Fast-Termination Option
Programming the FTE bit in the base address register for the fast-termination
option causes the chip-select function to terminate the cycle by asserting the
internal
DSACKx early, providing a two-cycle external access.