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MOTOROLA
MC68330 USER’S MANUAL
3- 5
3.1.8.3 AUTOVECTOR (
AVEC). This signal can be used to terminate interrupt
acknowledge cycles, indicating that the MC68330 should internally generate a vector
(autovector) number to locate an interrupt handler routine.
AVEC can be generated either
externally or internally by the SIM40 (refer to Section 4 System Integration Module for
additional information).
AVEC is ignored during all other bus cycles.
3.2 DATA TRANSFER MECHANISM
The MC68330 supports byte, word, and long-word operands, allowing access to 8- and
16-bit data ports through the use of asynchronous cycles controlled by
DSACK1 and
DSACK0. The MC68330 also supports byte, word, and long-word operands, allowing
access to 8- and 16-bit data ports through the use of synchronous cycles controlled by the
fast-termination capability of the SIM40.
3.2.1 Dynamic Bus Sizing
The MC68330 dynamically interprets the port size of the addressed device during each
bus cycle, allowing operand transfers to or from 8- and 16-bit ports. During an operand
transfer cycle, the slave device signals its port size (byte or word) and indicates
completion of the bus cycle to the MC68330 through the use of the
DSACKx inputs. Refer
to Table 3-3 for
DSACKx encodings.
Table 3-3.
DSACKx Encodings
DSACK1
DSACK0
Result
1
(Negated)
1
(Negated)
Insert Wait States in Current Bus Cycle
1
(Negated)
0
(Asserted)
Complete Cycle — Data Bus Port Size is 8 Bits
0
(Asserted)
1
(Negated)
Complete Cycle — Data Bus Port Size is 16 Bits
0
(Asserted)
0
(Asserted)
Reserved — Defaults to 16-Bit Port Size
For example, if the MC68330 is executing an instruction that reads a long-word operand
from a 16-bit port, the MC68330 latches the 16 bits of valid data and runs another bus
cycle to obtain the other 16 bits. The operation from an 8-bit port is similar, but requires
four read cycles. The addressed device uses
DSACKx to indicate the port width. For
instance, a 16-bit device always returns
DSACKx for a 16-bit port (regardless of whether
the bus cycle is a byte or word operation).
Dynamic bus sizing requires that the portion of the data bus used for a transfer to or from
a particular port size be fixed. A 16-bit port must reside on data bus bits 15–0, and an 8-bit
port must reside on data bus bits 15–8. This requirement minimizes the number of bus
cycles needed to transfer data to 8- and 16-bit ports and ensures that the MC68330
correctly transfers valid data.
The
UWE/LWE signals are only valid for a 16-bit port width. Since an 8-bit port must
reside on data bus bits 15-8, the
UWE/LWE signals are not required. AS or CS should be
used for an 8-bit port.