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6-8
MC68330 USER’S MANUAL
MOTOROLA
6.3 INSTRUCTION REGISTER
The MC68330 IEEE 1149.1 implementation includes the three mandatory public
instructions (EXTEST, SAMPLE/PRELOAD, and BYPASS), but does not support any of
the optional public instructions defined by IEEE 1149.1. One additional public instruction
(HI-Z) provides the capability for disabling all device output drivers. The MC68330
includes a 3-bit instruction register without parity, consisting of a shift register with three
parallel outputs. Data is transferred from the shift register to the parallel outputs during
the update-IR controller state. The three bits are used to decode the four unique
instructions listed in Table 6-3.
The parallel output of the instruction register is reset to all ones in the test-logic-reset
controller state. Note that this preset state is equivalent to the BYPASS instruction.
Table 6-3. Instructions
Code
B2
B1
B0
Instruction
000
EXTEST
001
SAMPLE/PRELOAD
X1
X
BYPASS
100
HI-Z
101
BYPASS
During the capture-IR controller state, the parallel inputs to the instruction shift register
are loaded with the standard 2-bit binary value (01) into the two least significant bits and
the loss-of-crystal (LOC) status signal into bit 2. The parallel outputs, however, remain
unchanged by this action since an update-IR signal is required to modify them.
The LOC status bit of the instruction register indicates whether an internal clock is
detected when operating with a crystal clock source. The LOC bit is clear when a clock is
detected and set when it is not. The LOC bit is always clear when an external clock is
used. The LOC bit can be used to detect faulty connectivity when a crystal is used to
clock the device.
6.3.1 EXTEST (000)
The external test (EXTEST) instruction selects the 108-bit boundary scan register.
EXTEST asserts internal reset for the MC68330 system logic to force a predictable
benign internal state while performing external boundary scan operations.
By using the TAP, the register is capable of a) scanning user-defined values into the
output buffers, b) capturing values presented to input pins, c) controlling the direction of
bidirectional pins, and d) controlling the output drive of three-state output pins.
6.3.2 SAMPLE/PRELOAD (001)
The SAMPLE/PRELOAD instruction selects the 108-bit boundary scan register, and
provides two separate functions. First, it provides a means to obtain a snapshot of system
data and control signals. The snapshot occurs on the rising edge of TCK in the capture-