![](http://datasheet.mmic.net.cn/90000/MC68330FC16_datasheet_3506366/MC68330FC16_181.png)
MOTOROLA
MC68330 USER'S MANUAL
5- 77
accessed a second time when the instruction is restarted. If a register used in an EA
calculation is overwritten before a fault occurs, an incorrect EA is calculated upon
instruction restart.
5.6.3.2.6 Type III — Correcting Faults via RTE. The preferred method of MOVEM bus
fault recovery is to correct the cause of the fault and then execute an RTE instruction
without altering the stack contents.
The RTE recognizes that MOVEM was in progress when a fault occurred, restores the
appropriate machine state, refetches the instruction, repeats the faulted transfer, and
continues the instruction.
MOVEM is the only instruction continued upon return from an exception handler. Although
the instruction is refetched, the EA is not recalculated, and the mask is rescanned the
same number of times as before the fault; modifying the code prior to RTE can cause
unexpected results.
5.6.3.2.7 Type IV — Correcting Faults via Software. BERR exceptions can occur during
exception processing while the processor is fetching an exception vector or while it is
stacking. The same stack frame and SSW are used in both cases, but each has a distinct
fault address. The stacked faulted exception format/vector word identifies the type of
faulted exception and the contents of the remainder of the frame. A fault address
corresponding to the vector specified in the stacked format/vector word indicates that the
processor could not obtain the address of the exception handler.
A BERR exception handler should execute RTE after correcting a fault. RTE restores the
internal machine state, fetches the address of the original exception handler, recreates the
original exception stack frame, and resumes execution at the exception handler address.
If the fault is intractable, the exception handler should rewrite the faulted exception stack
frame at SP
+ $14 + $06 and then jump directly to the original exception handler. The
stack frame can be generated from the information in the BERR frame: the pre-exception
SR (SP
+ $0C), the format/vector word (SP + $0E), and, if the frame being written is a six-
word frame, the PC of the instruction causing the exception (SP
+ $10). The return PC
value is available at SP
+ $02.
A stacked fault address equal to the current SP may indicate that, although the first
exception received a BERR while stacking, the BERR exception stacking was successfully
completed. This occurrence is extremely improbable, but the CPU32 supports recovery
from it. Once the exception handler determines that the fault has been corrected, recovery
can proceed as described previously. If the fault cannot be corrected, move the supervisor
stack to another area of memory, copy all valid stack frames to the new stack, create a
faulted exception frame on top of the stack, and resume execution at the exception
handler address.
5.6.4 CPU32 Stack Frames
The CPU32 generates three different stack frames: four-word frames, six-word frames,
and twelve-word BERR frames.
5.6.4.1 FOUR-WORD STACK FRAME. This stack frame is created by interrupt, format
error, TRAP #n, illegal instruction, A-line and F-line emulator trap, and privilege violation