参数资料
型号: MT45W2MW16BBB-856WT
元件分类: SRAM
英文描述: 2M X 16 PSEUDO STATIC RAM, 85 ns, PBGA54
封装: 6 X 8 MM, 1 MM HEIGHT, 0.75 MM PITCH, LEAD FREE, VFBGA-54
文件页数: 30/56页
文件大小: 709K
代理商: MT45W2MW16BBB-856WT
4 MEG x 16, 2 MEG x 16
ASYNC/PAGE/BURST CellularRAM MEMORY
09005aef80be1fbd pdf/09005aef80be2036 zip
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Burst CellularRAM_2.fm - Rev. D 9/04 EN
36
2003 Micron Technology, Inc. All rights reserved.
Figure 28: Single-Access Burst READ Operation
NOTE:
1. Non-default BCR settings for single-access burst READ operation: Latency code two (three clocks); WAIT active LOW;
WAIT asserted during delay.
2. Clock rates below 50 MHz (tCLK > 20ns) are allowed as long as tCSP specifications are met.
A[21:0]
VIH
VIL
ADV#
VIH
VIL
CE#
VIH
VIL
OE#
VIH
VIL
WE#
VIH
VIL
WAIT
DQ[15:0]
VOH
VOL
CLK
VIH
VIL
VOH
VOL
tSP
tCLK
tACLK
tCEW
tHD
tABA
tCEM
VALID
OUTPUT
VALID
ADDRESS
High-Z
tKOH
tOHZ
tSP
tHD
LB#/UB#
VIH
VIL
tCSP
High-Z
tOLZ
High-Z
tHD
tSP
tHZ
tKP
tKHKL
tHD
tSP
UNDEFINED
DON’T CARE
READ Burst Identified
(WE# = HIGH)
tKHTL
tBOE
Table 22:
Burst READ Timing Parameters—Single Access
SYMBO
L
-701
-708
-706/-856
UNITS
SYMBOL
-701
-708
-706/-856
UNITS
MIN
MAX
MIN
MAX
MIN MAX
MIN MAX MIN MAX MIN MAX
tABA
35
46.5
56
ns
tHZ
8
ns
tACLK
79
11
ns
tKHKL
1.6
1.8
2.0
ns
tBOE
20
ns
tKHTL
79
11
ns
tCEM
88
8
s
tKOH
2
ns
tCEW
17.517.5
1
7.5
ns
tKP
345
ns
tCLK
9.62
20
12.5
20
15
20
ns
tOHZ
8
ns
tCSP
420
4.5
20
5
20
ns
tOLZ
5
ns
tHD
22
2
ns
tSP
3
ns
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