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R8C/38T-A Group
16. Timer RB2
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 261 of 730
Aug 05, 2011
Figure 16.4
Example of 8-Bit Timer with 8-Bit Prescaler Operation in Programmable Waveform
Generation Mode
TOPL bit in
TRBIOC register
TSTART bit in
TRBCR register
Count source
Counter input
TCSTF bit in
TRBCR register
TRBPR register
TRBSC register
TRBPR
count register
TRBPRE
count register
TRBPR/TRBSC
reload register
load signal
TRBPRE
reload register
load signal
TRBO output pin
Interrupt request
one-shot signal
TRBPRE register
00h
01h
00h
01h
00h
01h
00h
01h
00h
FFh
0: High output during primary period, low output during secondary period, low output at timer stop
Set to 1 by a program
Synchronized with the peripheral system clock
Decrement
starts
01h
02h
01h
TRBSC
is reloaded
TRBSC
is reloaded
Primary period
Secondary period
Set to 0 by acknowledgment
of an interrupt request
or by a program
The above diagram applies under the following conditions:
TRBPRE register = 01h, TRBPR register = 01h, TRBSC register = 02h
TCNT16 bit in TRBMR register = 0 (8-bit timer with 8-bit prescaler)
TOPL bit = 0 (high output during primary period, low output during secondary period, low output at timer stop),
TOCNT bit = 0 (waveform output) in TRBIOC register
TRBIE bit in TRBIR register = 1 (timer RB2 interrupt enabled)
Secondary period
00h
01h
00h
01h
TRBPRE
is reloaded
(repeated)
TRBPRE
is reloaded
TRBPRE
is reloaded
TRBPRE
is reloaded
TRBPRE
is reloaded
TRBPRE
is reloaded
00h
02h
01h
00h
01h
00h
02h
01h
Data is retained when
the count clock stops
TRBPRE
is reloaded
TRBPRE
is reloaded
Primary period
TRBPR
is reloaded
When registers TRBPR, TRBSC,
and TRBPRE are written while
the count is stopped, values are
written to both the reload register
and counter