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R8C/38T-A Group
10. Power Control
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 118 of 730
Aug 05, 2011
10.4
Wait Mode
The CPU clock is stopped in wait mode. Thus the CPU, which operates using the CPU clock, and the watchdog
timer with the CPU clock selected as the count source are stopped. The oscillations of the XIN clock, XCIN clock,
high-speed on-chip oscillator, low-speed on-chip oscillator, and watchdog timer low-speed on-chip oscillator are
not stopped, so the peripheral functions that use these clocks continue operating.
10.4.1
Peripheral Function Clock Stop Function
When the CM02 bit in the CM0 register is 1 (peripheral function clock stops in wait mode), power consumption
is reduced because f1, f2, f4, f8, and f32 are stopped in wait mode.
10.4.2
Entering Wait Mode
The MCU enters wait mode when the WAIT instruction is executed or the CM30 bit in the CM3 register is set
to 1 (MCU enters wait mode).
When bits CM42 to CM40 bit in the CM4 register are set to 001b (fLOCO selected as CPU clock) or 101b
(fHOCO-F clock selected as CPU clock), set the OCD1 bit in the OCD register to 0 (oscillation stop detection
disabled) before executing the WAIT instruction or set the CM30 bit to 1 (MCU enters wait mode).
If the MCU enters wait mode while the OCD1 bit is 1 (oscillation stop detection enabled), power consumption
is not reduced because the CPU is not stopped.
To enter wait mode or stop mode while the FMR27 bit in the FMR2 register is 1 (low-current-consumption read
mode enabled), set bits CM37 and CM36 in the CM3 register to 00b (MUC exits using the CPU clock used
immediately before entering wait mode or stop mode) and the CM35 bit in the CM3 register to 0 (settings of
CM06 bit in CM0 register and bits CM16b and CM17 in CM1 register enabled).
10.4.3
Pin States in Wait Mode
The I/O ports retain the states immediately before the MCU enters wait mode.