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R8C/38T-A Group
21. Clock Synchronous Serial Interface
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 472 of 730
Aug 05, 2011
21.2.8.2
I2C bus Function
Notes:
1. When the STOP bit in the SISR register is 0, set the RE_STIE bit to 1 (stop condition detection interrupt request
enabled).
2. Enabling the overrun error interrupt request with the TE_NAKIE bit is valid in clock synchronous serial mode.
3. Enabling the overrun error interrupt request with the RIE bit is invalid in I2C bus interface mode.
Address 000E9h (SIER_0)
Bit
b7b6
b5
b4
b3b2b1
b0
Symbol
After Reset
0
Bit
Symbol
Bit Name
Function
R/W
b0
CEIE_ACKBT Transmit acknowledge select bit
0: In receive mode, 0 is transmitted as the
acknowledge bit
1: In receive mode, 1 is transmitted as the
acknowledge bit
R/W
b1
ACKBR
Receive acknowledge bit
0: In transmit mode, the acknowledge bit
received from the receive device is 0
1: In transmit mode, the acknowledge bit
received from the receive device is 1
R
b2
ACKE
Acknowledge bit detection select bit
0: Content of the receive acknowledge bit is
ignored and continuous transfer is
performed
1: When the receive acknowledge bit is 1,
transfer is halted
R/W
b3
RE_STIE
Stop condition detection interrupt
enable bit
0: Stop condition detection interrupt request
disabled
1: Stop condition detection interrupt request
R/W
b4
TE_NAKIE
NACK receive interrupt enable bit
0: NACK receive interrupt request and
arbitration lost/overrun error interrupt
request disabled
1: NACK receive interrupt request and
arbitration lost/overrun error interrupt
R/W
b5
RIE
Receive interrupt enable bit
(3)0: Receive data full interrupt request disabled
1: Receive data full interrupt request enabled
R/W
b6
TEIE
Transmit end interrupt enable bit
0: Transmit end interrupt request disabled
1: Transmit end interrupt request enabled
R/W
b7
TIE
Transmit interrupt enable bit
0: Transmit data empty interrupt request
disabled
1: Transmit data empty interrupt request
enabled
R/W