![](http://datasheet.mmic.net.cn/120000/R5F21388SDFP_datasheet_3573603/R5F21388SDFP_356.png)
R8C/38T-A Group
17. Timer RC
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 325 of 730
Aug 05, 2011
17.6
Notes on Timer RC
17.6.1
TRCCNT Register
The following notes apply when the CCLR bit in the TRCCR1 register is set to 1 (TRCCNT counter is cleared
by input capture/compare match A).
When writing a value to the TRCCNT register by a program while the CTS bit in the TRCMR register is set to
1 (count starts), ensure that the write timing does not coincide with when the TRCCNT register is set to 0000h.
If the timing when the TRCCNT register is set to 0000h and is written coincide, the value is not written and
the TRCCNT register is set to 0000h.
If the TRCCNT register is written and read, the value before this register is written may be read. In this case,
execute the JMP.B instruction between the write and read instructions.
Program Example
MOV.W
#XXXXh, TRCCNT
; Write
JMP.B
L1
; JMP.B instruction
L1:
MOV.W
TRCCNT, DATA
; Read
17.6.2
TRCCR1 Register
When setting bits CKS2 to CKS0 in the TRCCR1 register to 111b (fHOCO-F), set fHOCO-F to a clock
frequency higher than the CPU clock frequency.
17.6.3
TRCSR Register
If the TRCSR register is written and read, the value before this register is written may be read. In this case,
execute the JMP.B instruction between the write and read instructions.
Program Example
MOV.B
#XXh, TRCSR
; Write
JMP.B
L1
; JMP.B instruction
L1:
MOV.B
TRCSR, DATA
; Read
17.6.4
Count Source Switching
When switching the count source, stop the count before switching. After switching the count source, wait for at
least two cycles of the CPU clock before writing to the registers (at addresses 00138h to 0014Dh) associated
with timer RC.
Changing procedure
(1) Set the CTS bit in the TRCMR register to 0 (count stops).
(2) Change bits CKS0 to CKS2 in the TRCCR1 register.
(3) Wait for at least two cycles of the CPU clock.
(4) Write to the registers (at addresses 00138h to 0014Dh) associated with timer RC.
Notes:
1. Do not set the FRA00 bit to 0 (high-speed on-chip oscillator off) while fHOCO or fHOCO-F is selected
as the count source.
2. Do not change the division ratio of the high-speed on-chip oscillator set by the FRA2 register while
fHOCO-F is selected as the count source.