![](http://datasheet.mmic.net.cn/120000/R5F21388SDFP_datasheet_3573603/R5F21388SDFP_124.png)
R8C/38T-A Group
9. Clock Generation Circuit
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 93 of 730
Aug 05, 2011
CM30 Bit (Wait control bit)
When the CM30 bit is set to 1 (MCU enters wait mode), the CPU clock stops (wait mode). Since the XIN,
XCIN, low-speed on-chip oscillator, high-speed on-chip oscillator, and watchdog timer low-speed on-chip
oscillator clocks do not stop, the peripheral functions that use these clocks continue operating. When setting the
CM30 bit to 1, set the I flag to 0 (maskable interrupt disabled).
A reset or a peripheral function interrupt is used to exit wait mode. When a peripheral function interrupt is used
to exit wait mode, the MCU resumes executing the instruction immediately after the instruction to set the CM30
bit to 1.
However, when using the WAIT mode to enter wait mode, set the I flag to 1 (maskable interrupt enabled). With
this setting, interrupt handling is performed by the CPU when the MCU exits wait mode.
9.2.5
System Clock Control Register 4 (CM4)
Set the PRC0 bit in the PRCR register to 1 (write enabled) before setting the CM4 register.
9.2.6
Clock Prescaler Reset Flag (CPSRF)
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CPSR register.
Address 0000Ch
Bit
b7b6
b5b4b3
b2b1b0
Symbol
————
—
CM42
CM41
CM40
After Reset
0
000
0001
Bit
Symbol
Bit Name
Function
R/W
b0
CM40
CPU clock select bits
b2 b1 b0
0 0 0: XIN clock
0 0 1: fLOCO clock
0 1 0: XCIN clock
0 1 1: Do not set.
1 0 0: Do not set.
1 0 1: fHOCO-F clock
Other than the above: Do not set.
R/W
b1
CM41
R/W
b2
CM42
R/W
b3
—
Reserved
Set to 0.
R/W
b4
—
b5
—
b6
—
b7
—
Address 00010h
Bit
b7b6
b5b4b3
b2b1b0
Symbol
After Reset
0
000
0000
Bit
Symbol
Bit Name
Function
R/W
b0
—
Nothing is assigned. The write value must be 0. The read value is 0.
—
b1
—
b2
—
b3
—
b4
—
b5
—
b6
—
b7
CPSR
Clock prescaler reset bit
When this bit is set to 1, the clock prescaler is
initialized (the read value is 0).
R/W