R8C/38T-A Group
11. Interrupts
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0241EJ0010 Rev.0.10
Page 142 of 730
Aug 05, 2011
11.3.2
Relocatable Vector Table
The relocatable vector table occupies 256 bytes beginning from the start address set in the INTB register.
Notes:
1. These addresses are relative to that indicated by the INTB register.
2. These interrupts are not disabled by the I flag.
Table 11.4
Relocatable Vector Table (1)
Interrupt Source
Address (L) to Address (H)
Software
Interrupt
Number
Interrupt
Control
Register
Reference
+0 to +3 (00000h to 00003h)
0
—
R8C/5x Series
User’s manual: Software
Flash memory
+4 to +7 (00004h to 00007h)
1
FMRDYIC
— (Reserved)
+8 to +11 (00008h to 00007Bh)
2
—
— (Reserved)
+12 to +15 (0000Ch to 0000Fh)
3
—
— (Reserved)
+16 to +19 (00010h to 00013h)
4
—
— (Reserved)
+20 to +23 (00014h to 00017h)
5
—
INT4
+24 to +27 (00018h to 0001Bh)
6
INT4IC
Timer RC_0
+28 to +31 (0001Ch to 0001Fh)
7
TRCIC_0
— (Reserved)
+32 to +35 (00020h to 00023h)
8
—
— (Reserved)
+36 to +39 (00024h to 00027h)
9
—
Timer RE2
+40 to +43 (00028h to 0002Bh)
10
TRE2IC
UART2 transmit/NACK2
+44 to +47 (0002Ch to 0002Fh)
11
U2TIC
UART2 receive/ACK2
+48 to +51 (00030h to 00033h)
12
U2RIC
Key input
+52 to +55 (00034h to 00037h)
13
KUPIC
A/D conversion
+56 to +59 (00038h to 0003Bh)
14
ADIC
Synchronous serial
communication unit/
I2C bus interface
+60 to +63 (0003Ch to 0003Fh)
15
SSUIC_0/
IICIC_0
— (Reserved)
+64 to +67 (00040h to 00043h)
16
—
UART0_0 transmit
+68 to +71 (00044h to 00047h)
17
U0TIC_0
UART0_0 receive
+72 to +75 (00048h to 0004Bh)
18
U0RIC_0
UART0_1 transmit
+76 to +79 (0004Ch to 0004Fh)
19
U0TIC_1
UART0_1 receive
+80 to +83 (00050h to 00053h)
20
U0RIC_1
INT2
+84 to +87 (00054h to 00057h)
21
INT2IC
Timer RJ_0
+88 to +91 (00058h to 0005Bh)
22
TRJIC_0
— (Reserved)
+92 to +95 (0005Ch to 0005Fh)
23
—
Timer RB2_0
+96 to +99 (00060h to 00063h)
24
TRB2IC_0
INT1 (multiplexed with
comparator B)
+100 to +103 (00064h to 00067h)
25
INT1IC
INT3 (multiplexed with
comparator B)
+104 to +107 (00068h to
0006Bh)
26
INT3IC
— (Reserved)
+108 to +111 (0006Ch to
0006Fh)
27
—
— (Reserved)
+112 to +115 (00070h to 00073h)
28
—
INT0
+116 to +119 (00074h to 00077h)
29
INT0IC
UART2 bus collision
detection
+120 to +123 (00078h to
0007Bh)
30
U2BCNIC
— (Reserved)
+124 to +127 (0007Ch to
0007Fh)
31
—