参数资料
型号: M-ORSO82G51BM680-DB
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: FPGA
英文描述: FPGA, 1296 CLBS, 333000 GATES, PBGA680
封装: PLASTIC, FBGA-680
文件页数: 105/123页
文件大小: 2207K
代理商: M-ORSO82G51BM680-DB
Lattice Semiconductor
ORCA ORSO82G5 Data Sheet
82
Table 21. Common Control Register Descriptions (continued)
(0x) Abso-
lute
Address
Bit
Name
Reset
Value
(0x)
Description
Mode
30A03
[0]
NO_TX_RDI_EXSEQ
00
Not Transmission of RDI, If
NO_TX_RDI_EXSEQ = 1, a transmit link will
not send data if its corresponding receive link is
not good due to excessive sequence errors. If
this bit is set to 0, a transmit link will still send
data even if its corresponding receive link has
excessive sequence errors. This bit should
always be set during simulation.
Cell
[1]
AUTO_BUNDLE
Automatic (Link) Bundle, AUTO_BUNDLE = 1
allows a link within a link group to remain active
even when another link within that group is
defective. Cell data from all links within that
group will continue to be sent to the FPGA. If
this bit is set to 0, then all links within a link
group must be good before cell data are read
from the links by the IPC and passed to the
FPGA.
Cell
[2]
RSVD
Reserved
[3]
AUTO_REJOIN_A
Automatic (Link) Rejoin, AUTO_REJOIN = 1
forces any link in a SERDES quad to reassert a
“RX link good” signal automatically when three
consecutive sequence numbers are correct on
that link.
Cell
[4]
AUTO_REMOVE_A
Automatic (Link) Remove, AUTO_REMOVE = 1
indicates that any link in a SERDES quad
which sees three excessive sequence errors
should deassert the “RX link good” signal which
will cause the link to be inactive.
Cell
[5]
RSVD
Reserved
[6]
AUTO_REJOIN_B
Automatic (Link) Rejoin, AUTO_REJOIN = 1
forces any link in a SERDES quad to reassert a
“RX link good” signal automatically when three
consecutive sequence numbers are correct on
that link.
Cell
[7]
AUTO_REMOVE_B
AUTO_REMOVE_B = 1 indicates that any link in
SERDES quad B which sees three excessive
sequence errors should deassert the “RX link
good” signal which will cause the link to be
inactive.
Cell
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