参数资料
型号: W631GG6KB-15
厂商: Winbond Electronics
文件页数: 102/159页
文件大小: 0K
描述: IC DDR3 SDRAM 1GBIT 96WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR3 SDRAM
存储容量: 1G(64M x 16)
速度: 667MHz
接口: 并联
电源电压: 1.425 V ~ 1.575 V
工作温度: 0°C ~ 85°C
封装/外壳: 96-TFBGA
供应商设备封装: 96-WBGA(9x13)
包装: 托盘
W631GG6KB
The DC-tolerance limits and AC-noise limits for the reference voltages V REFCA and V REFDQ are
illustrated in Figure 89. It shows a valid reference voltage V REF (t) as a function of time. (V REF stands
for V REFCA and V REFDQ likewise).
V REF(DC) is the linear average of V REF (t) over a very long period of time (e.g., 1 sec). This average
has to meet the min/max requirements in Table 17. Furthermore V REF (t) may temporarily deviate from
V REF(DC) by no more than ± 1% V DD .
voltage
V DD
V REF AC -noise
V REF (t)
V REF(DC) max
V REF(DC)
V DD /2
V REF(DC) min
V SS
time
Figure 89 – Illustration of V REF(DC) tolerance and V REF AC-noise limits
The voltage levels for setup and hold time measurements V IH(AC) , V IH(DC) , V IL(AC) , and V IL(DC) are
dependent on V REF .
― V REF ‖ shall be understood as V REF(DC) , as defined in Figure 89.
This clarifies that DC-variations of V REF affect the absolute voltage a signal has to reach to achieve a
valid high or low level and therefore the time to which setup and hold is measured. System timing and
voltage budgets need to account for V REF(DC) deviations from the optimum position within the data-
eye of the input signals.
This also clarifies that the DRAM setup/hold specification and derating values need to include time
and voltage associated with V REF AC-noise. Timing and voltage effects due to AC-noise on V REF up
to the specified limit (± 1% of V DD ) are included in DRAM timings and their associated deratings.
Publication Release Date: Dec. 09, 2013
Revision A05
- 102 -
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