参数资料
型号: W631GG6KB-15
厂商: Winbond Electronics
文件页数: 15/159页
文件大小: 0K
描述: IC DDR3 SDRAM 1GBIT 96WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR3 SDRAM
存储容量: 1G(64M x 16)
速度: 667MHz
接口: 并联
电源电压: 1.425 V ~ 1.575 V
工作温度: 0°C ~ 85°C
封装/外壳: 96-TFBGA
供应商设备封装: 96-WBGA(9x13)
包装: 托盘
W631GG6KB
8.3
Programming the Mode Registers
For application flexibility, various functions, features, and modes are programmable in four Mode
Registers, provided by the DDR3 SDRAM, as user defined variables and they must be programmed
via a Mode Register Set (MRS) command. As the default values of the Mode Registers (MR#) are not
defined, contents of Mode Registers must be fully initialized and/or re-initialized, i.e., written, after
power up and/or reset for proper operation. Also the contents of the Mode Registers can be altered by
re-executing the MRS command during normal operation. When programming the mode registers,
even if the user chooses to modify only a sub-set of the MRS fields, all address fields within the
accessed mode register must be redefined when the MRS command is issued. MRS command and
DLL Reset do not affect array contents, which mean these commands can be executed any time after
power-up without affecting the array contents.
The mode register set command cycle time, t MRD is required to complete the write operation to the
mode register and is the minimum time required between two MRS commands shown in Figure 3.
T0
T1
T2
Ta0
Ta1
Tb0
Tb1
Tb2
Tc0
Tc1
Tc2
CK#
CK
Command
Address
VALID
VALID
VALID
VALID
VALID
VALID
MRS
VALID
NOP/DES
VALID
NOP/DES
VALID
MRS
VALID
NOP/DES
VALID
NOP/DES
VALID
VALID
VALID
VALID
VALID
CKE
Settings
Old settings
Rtt_Nom ENABLED prior and/or after MRS command
t MRD
Updating Settings
t MOD
New Settings
ODT
VALID
VALID
ODTLoff+1
VALID
Rtt_Nom DISABLED prior and/or after MRS command
ODT
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
TIME BREAK
DON'T CARE
Figure 3 – t MRD Timing
Publication Release Date: Dec. 09, 2013
Revision A05
- 15 -
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