参数资料
型号: IP-SDI
厂商: Altera
文件页数: 33/140页
文件大小: 0K
描述: IP VIDEO INTERFACE - SDI
标准包装: 1
系列: *
类型: MegaCore
功能: 视频系统用串行数字接口
许可证: 初始许可证
Chapter 3: Functional Description
Block Description
3–3
Internal switching between two reference clock signals in the transmitter block.
This feature is optional and only available for Arria II GZ, Stratix IV GX , and
HardCopy IV devices.
Figure 3–2 shows the top-level block diagram for the SDI transmitter.
Figure 3–2. SDI Transmitter Block Diagram
SDI TRANSMITTER
Protocol Block
rst_tx
tx_pclk
txdata[19:0]
tx_std[1:0]
tx_trs
tx_ln[21:0]
enable_ln
enable_crc
TRS Match
LN Insert
CRC (c)
CRC (y)
Scrambler
Transceiver Interface Block
rst_tx
tx_pclk
FIFO
GXB RX Sample
tx_status
gxb_tx_clkout
reset
tx_serial_refclk
tx_serial_refclk1 (optional)
Transceiver Block
sdi_tx (serial data)
sdi_reconfig_fromgxb[16
gxb4_cal_clk
sdi_reconfig_togxb[3:0]
sdi_gxb_powerdown
For HD-SDI, the transmitter accepts 20-bit parallel video data; for SD-SDI, 10-bit
parallel data. For txdata bus definition, refer to Table 3–16 on page 3–41 .
February 2013
Altera Corporation
Serial Digital Interface (SDI) MegaCore Function
User Guide
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IP-SDI-II 功能描述:开发软件 SDI II Video MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/DDR 功能描述:开发软件 DDR SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/DDR2 功能描述:开发软件 DDR2 SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/DDR3 功能描述:开发软件 DDR3 SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/HPDDR 功能描述:开发软件 DDR SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors