参数资料
型号: IP-SDI
厂商: Altera
文件页数: 60/140页
文件大小: 0K
描述: IP VIDEO INTERFACE - SDI
标准包装: 1
系列: *
类型: MegaCore
功能: 视频系统用串行数字接口
许可证: 初始许可证
3–30
Chapter 3: Functional Description
Block Description
Figure 3–19 shows a flow chart of the SDI dynamic reconfiguration process for
transceiver-based devices.
Figure 3–18. Dynamic Reconfiguration Process Flow for Transceiver-based Devices
ALT2GXB_RECO N FIG Control Logic
Idle
Reconfig u ration
SDI MegaCore (Recei v er/D u plex)
in Process
N ormal Operation
Yes
ALT2GXB_RECO N FIG
B u sy?
Data
Rate Change?
Yes
N o
N o
Write to ALT2GXB
Start DPRIO
SDI_START_RECO N FIG
Reconfig u ration
Last ROM
Address?
N o
in Process
Yes
Reconfig u ration
Done
N o
Reconfig u ration
Done?
SDI_RECO N FIG_DO N E
Yes
Notes to Figure 3–18 :
(1) SDI MegaCore (Receiver/Duplex) asserts rx_analogreset and rx_digitalreset signals to transceiver when the
transceiver is being reconfigured.
(2) The rx_analogreset signal deasserts when the transceiver is completely reconfigured, and rx_digitalreset
signal deasserts when rx_pll is stable.
Serial Digital Interface (SDI) MegaCore Function
User Guide
February 2013 Altera Corporation
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IP-SDI-II 功能描述:开发软件 SDI II Video MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/DDR 功能描述:开发软件 DDR SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/DDR2 功能描述:开发软件 DDR2 SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/DDR3 功能描述:开发软件 DDR3 SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-SDRAM/HPDDR 功能描述:开发软件 DDR SDRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors