参数资料
型号: S5933QE
厂商: APPLIEDMICRO INC
元件分类: 总线控制器
英文描述: PCI BUS CONTROLLER, PQFP160
封装: PLASTIC, QFP-160
文件页数: 2/176页
文件大小: 823K
代理商: S5933QE
3-18
SIGNAL DESCRIPTIONS
S5933
Arbitration Pins (Bus Masters Only) — PCI Local Bus
Signal
Type
Description
Error Reporting Pins — PCI Local Bus
Signal
Type
Description
Interrupt Pin — PCI Local Bus
Signal
Type
Description
REQ#
out
Request. This signal is sourced by an agent wishing to become the bus master. It is a
point-to-point signal and each master has its own REQ#.
GNT#
in
Grant. The GNT# signal is a dedicated, point-to-point signal provided to each poten-
tial bus master and signifies that access to the bus has been granted.
PERR#
s/t/s
Parity Error. This pin is used for reporting parity errors during the data portion of a
bus transaction for all cycles except a Special Cycle. It is sourced by the agent
receiving data and driven active two clocks following the detection of the error. This
signal is driven inactive (high) for one clock cycle prior to returning to the tri-state
condition.
SERR#
o/d
System Error. This pin is used for reporting address parity errors, data parity errors
on Special Cycle commands, or any error condition having a catastrophic system
impact.
INTA#
o/d
Interrupt A. This pin is a level sensitive, low active interrupt to the host. The INTA#
interrupt must be used for any single function device requiring an interrupt capability.
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