参数资料
型号: S5933QE
厂商: APPLIEDMICRO INC
元件分类: 总线控制器
英文描述: PCI BUS CONTROLLER, PQFP160
封装: PLASTIC, QFP-160
文件页数: 99/176页
文件大小: 823K
代理商: S5933QE
3-37
PCI CONFIGURATION REGISTERS
S5933
LATENCY TIMER REGISTER (LAT)
Register Name:
Latency Timer
Address Offset:
0Dh
Power-up value:
00h
Boot-load:
External nvRAM offset
04Dh
Attribute:
Read/Write, bits 7:3;
Read Only bits 2:0
Size:
8 bits
The latency timer register has meaning only when
this controller is used as a bus master and pertains to
the number of PCI bus clocks that this master will be
guaranteed. The nonzero value for this register is
internally decremented after this device has been
granted the bus and has begun to assert FRAME#.
Prior to this latency timer count reaching zero, this
device can ignore the removal of the bus grant and
may continue the use of the bus for data transfers.
7
0
Latency Timer value (R/W)
# of clocks x 8
0
1
0
2
0
3
X
4
X
5
X
6
X
Bit
Value
Figure 8. Latency Timer Register
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