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参数资料
| 型号： | S5933QE |
| 厂商： | APPLIEDMICRO INC |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封装： | PLASTIC, QFP-160 |
| 文件页数： | 34/176页 |
| 文件大小： | 823K |
| 代理商： | S5933QE |
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3-142
PASS-THRU OVERVIEW
S5933
PCI Read Retries
When the S5933 requests a retry for a PCI Pass-
Thru read, it indicates that the Add-On could not
complete the read in the required time. The Pass-
Thru data cannot be read by the PCI interface until
the Add-On asserts PTRDY#, indicating the access is
complete.
If the retry occurs after the Add-On has completed
the Pass-Thru operation by writing the appropriate
data into the Pass-Thru data register and asserting
PTRDY#, the S5933 asserts DEVSEL# and TRDY#
to complete the PCI read. If the Add-On still has not
completed the Pass-Thru read, the S5933 waits for
the required 16 clocks. If the Add-On completes the
access during this time, TRDY# is asserted and the
access is finished. If the Add-On cannot complete the
access within 16 clocks, another retry is requested.
When the Add-On is busy completing a Pass-Thru
read, the S5933 requests an immediate retry for all
Pass-Thru region accesses, except the region cur-
rently completing the previous access. This allows
the PCI bus to perform other operations. The next
access to the Pass-Thru region which initiated the
retry must be to the same address which caused the
retry. Another initiator accessing the same Pass-Thru
region causes the S5933 to respond with the original
initiator’s data (for reads). S5933 PCI Operation Reg-
isters may be accessed while the Add-On is still com-
pleting a Pass-Thru access. Only other Pass-Thru
region accesses receive retry requests.
Add-On Bus Interface
The Pass-Thru address and data registers can be ac-
cessed as Add-On operation registers. The interface
to the Pass-Thru registers is described in. The Pass-
Thru data register is updated on the rising edge of
BPCLK. For this reason, all Pass-Thru inputs must be
synchronous to BPCLK. In the following sections the
Add-On Pass-Thru interface is described for Pass-
Thru single cycle accesses, burst accesses, target-
requested retries, and when using 8-bit and 16-bit
Add-On data buses.
Single Cycle Pass-Thru Writes
A single cycle Pass-Thru write operation occurs
when a PCI initiator writes a single value to a Pass-
Thru region. PCI single cycle transfers consists of an
address phase and one data phase. During the ad-
dress phase of the PCI transfer, the S5933 stores the
PCI address into the Pass-Thru Address Register
(APTA). If the S5933 determines that the address is
within one of its defined Pass-Thru regions, it cap-
tures the PCI data into the Pass-Thru Data Register
(APTD).
Figure 1 shows a single cycle Pass-Thru write access
(Add-On read). The Add-On must read the data stored
in the APTD register and transfer it to its destination.
Note: RD# may be asserted for multiple clocks to
allow interfacing with slow Add-On devices. Data re-
mains valid until PTRDY# is asserted.
Note:
For all Add-On accesses using PTADR for address data when
in 16 bit mode, ADR[1] must be held low to get the low address
word.
BPCLK
012345
0h
1
2Ch
0h
PTATN#
PTBURST#
PTNUM[1:0]
PTWR
PTBE[3:0]#
SELECT#
ADR[6:2]
BE[3:0]#
RD#
DQ[31:0]
PTRDY#
PT DATA
PCI Write cycle completed
Figure 1. Single Cycle Pass-Thru Write
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S5935 | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935_07 | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S59355QRC | 制造商:AppliedMicro 功能描述: |
| S5935QF | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935QRC | 制造商:AppliedMicro 功能描述:PCI Master Device 160-Pin PQFP |
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