APPENDIX A LIST OF I/O REGISTERS
AP-A-30
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
0x5069, 0x5420–0x542c
16-bit PWM Timer Ch.1
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
T16A Clock
Control Register
Ch.1
(T16A_CLK1)
0x5069
(8 bits)
D7–4 CLKDIV
[3:0]
Clock division ratio select
CLKDIV[3:0]
Division ratio
0x0 R/W
OSC3 or
IOSC
OSC1
0xf
0xe
0xd
0xc
0xb
0xa
0x9
0x8
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
–
1/16384
1/8192
1/4096
1/2048
1/1024
1/512
1/256
1/128
1/64
1/32
1/16
1/8
1/4
1/2
1/1
–
1/256
1/128
1/64
1/32
1/16
1/8
1/4
1/2
1/1
D3–2 CLKSRC
[1:0]
Clock source select
CLKSRC[1:0]
Clock source
0x0 R/W
* S1C17564 only
0x3
0x2
0x1
0x0
External clock
OSC3
OSC1
IOSC*
D1
–
reserved
–
D0
CLKEN
Count clock enable
1 Enable
0 Disable
0
R/W
T16A Counter
Ch.1 Control
Register
(T16A_CTL1)
0x5420
(16 bits)
D15–6 –
reserved
–
0 when being read.
D5–4 CCABCNT
[1:0]
Counter select
CCABCNT[1:0] Counter Ch.
0x0 R/W
0x3
0x2
0x1
0x0
Ch.3
Ch.2
Ch.1
Ch.0
D3
CBUFEN
Compare buffer enable
1 Enable
0 Disable
0
R/W
D2
TRMD
Count mode select
1 One-shot
0 Repeat
0
R/W
D1
PRESET
Counter reset
1 Reset
0 Ignored
0
W 0 when being read.
D0
PRUN
Counter run/stop control
1 Run
0 Stop
0
R/W
T16A Counter
Ch.1 Data
Register
(T16A_TC1)
0x5422
(16 bits)
D15–0 T16ATC
[15:0]
Counter data
T16ATC15 = MSB
T16ATC0 = LSB
0x0 to 0xffff
0x0
R
T16A
Comparator/
Capture Ch.1
Control Register
(T16A_CCCTL1)
0x5424
(16 bits)
D15–14 CAPBTRG
[1:0]
Capture B trigger select
CAPBTRG[1:0] Trigger edge
0x0 R/W
0x3
0x2
0x1
0x0
↑ and ↓
↓
↑
None
D13–12 TOUTBMD
[1:0]
TOUT B mode select
TOUTBMD[1:0]
Mode
0x0 R/W
0x3
0x2
0x1
0x0
cmp B:
↑ or ↓
cmp A:
↑ or ↓
cmp A:
↑, B: ↓
Off
D11–10 –
reserved
–
0 when being read.
D9
TOUTBINV TOUT B invert
1 Invert
0 Normal
0
R/W
D8
CCBMD
T16A_CCB register mode select
1 Capture
0 Comparator
0
R/W
D7–6 CAPATRG
[1:0]
Capture A trigger select
CAPATRG[1:0] Trigger edge
0x0 R/W
0x3
0x2
0x1
0x0
↑ and ↓
↓
↑
None
D5–4 TOUTAMD
[1:0]
TOUT A mode select
TOUTAMD[1:0]
Mode
0x0 R/W
0x3
0x2
0x1
0x0
cmp B:
↑ or ↓
cmp A:
↑ or ↓
cmp A:
↑, B: ↓
Off
D3–2 –
reserved
–
0 when being read.
D1
TOUTAINV TOUT A invert
1 Invert
0 Normal
0
R/W
D0
CCAMD
T16A_CCA register mode select
1 Capture
0 Comparator
0
R/W
T16A
Comparator/
Capture Ch.1 A
Data Register
(T16A_CCA1)
0x5426
(16 bits)
D15–0 CCA[15:0] Compare/capture A data
CCA15 = MSB
CCA0 = LSB
0x0 to 0xffff
0x0 R/W
T16A
Comparator/
Capture Ch.1 B
Data Register
(T16A_CCB1)
0x5428
(16 bits)
D15–0 CCB[15:0] Compare/capture B data
CCB15 = MSB
CCB0 = LSB
0x0 to 0xffff
0x0 R/W