11 16-BIT PWM TIMERS (T16A)
11-2
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
Comparator/capture block
The comparator/capture block includes two systems (units A and B) of comparators that compare between the
counter value and the specified comparison value and capture circuits that capture the counter value by an ex-
ternal trigger signal. Note, however, that the comparator and capture functions cannot be used at the same time
in each system. One of the two functions must be selected by the software switch.
When using the comparator function, set the value(s) to be compared with the counter value to the compare A
and/or compare B registers. When the counter reaches the value set in the compare A or compare B register, the
comparator asserts the compare A or compare B signal. These signals can generate interrupts. Also the signals
control the cycle time and duty ratio of the timer output signal allowing the timer to output a PWM or other
waveform. In addition to these functions, the compare B signal is used to reset the counter.
Comparison data can be read or written directly from/to the compare A and compare B registers. The compare
buffers are separately provided to load data to the compare A and compare B registers automatically by the
compare B signal. Software can select which of the compare register and buffer the comparison values are writ-
ten to.
When the capture function is enabled, the compare A and compare B registers are used as the capture A and
capture B registers, respectively. The capture A and capture B circuits can input a trigger signal individually,
and the counter value is loaded to the respective capture register at the selected edge of the trigger signal.
The capturing operation can generate an interrupt, this make it possible to read the captured data in the interrupt
handler routine. Also an overwrite interrupt can be generated for the error handling when the counter value is
captured before reading the previous captured data.
Combination of counter block channel and comparator/capture block channel
Generally, a counter block is connected to the comparator/capture block with the same channel number. The
counter block and the comparator/capture block in different channels can also be connected. This allows a
counter to use two or more comparator/capture blocks for expanding the comparison/capturing function from
two systems to maximum eight systems (details are described later).
Note: Each channel of the T16A module has the same functions except for the control register address-
es. The description in this section applies to all channels of the T16A module otherwise a channel
number is specified. The ‘x’ in the register name refers to the channel number (0 to 3).
Example: T16A_CTLx register
Ch.0: T16A_CTL0 register
Ch.1: T16A_CTL1 register
Ch.2: T16A_CTL2 register
Ch.3: T16A_CTL3 register
T16A Input/Output Pins
11.2
Table 11.2.1 lists the input/output pins for the T16A module.
2.1 List of T16A Pins
Table 11.
Pin name
I/O
Qty
Function
EXCL0
(for Ch.0)
EXCL1
(for Ch.1)
EXCL2
(for Ch.2)
EXCL3
(for Ch.3)
I
4
External clock input pins
Inputs an external clock for the event counter function.
CAP0, CAP1
(for Ch.0)
CAP2, CAP3
(for Ch.1)
CAP4, CAP5
(for Ch.2)
CAP6, CAP7
(for Ch.3)
I
8
Counter-capture trigger signal input pins (effective in capture mode)
The specified edge (falling edge, rising edge, or both) of the signal input
to the CAP0/2/4/6 pin captures the counter data into the capture A reg-
ister. The CAP1/3/5/7 pin input signal captures the counter data into the
capture B register.
TOUT0, TOUT1 (for Ch.0)
TOUT2, TOUT3 (for Ch.1)
TOUT4, TOUT5 (for Ch.2)
TOUT6, TOUT7 (for Ch.3)
O
8
Timer generating signal output pins (effective in comparator mode)
Each channel has two output pins and the signals generated in different
conditions can be output.