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7 CLOCK GENERATOR (CLG)
7-2
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
CLG Input/Output Pins
7.2
Table 7.2.1 lists the input/output pins for the CLG module.
2.1 List of CLG Pins
Table 7.
Pin name
I/O
Qty
Function
OSC1
I
1
OSC1 oscillator input pin
Connect a crystal resonator (32.768 kHz) and a gate capacitor.
Or input an external clock used as the OSC1 clock.
OSC2
O
1
OSC1 oscillator output pin
Connect a crystal resonator (32.768 kHz).
OSC3
I
1
OSC3 oscillator input pin
Connect a crystal or ceramic resonator (max. 24 MHz), a feedback resistor, and a
gate capacitor.
Or input an external clock used as the OSC3 clock.
OSC4
O
1
OSC3 oscillator output pin
Connect a crystal or ceramic resonator (max. 24 MHz), a feedback resistor, and a
drain capacitor.
FOUTA
O
1
FOUTA clock output pin
Outputs a divided IOSC/OSC3 clock or the OSC1 clock.
FOUTB
O
1
FOUTB clock output pin
Outputs a divided IOSC/OSC3 clock or the OSC1 clock.
The CLG output pins (FOUTA, FOUTB) are shared with I/O ports and are initially set as general purpose I/O port
pins. The pin functions must be switched using the port function select bits to use the general purpose I/O port pins
as the CLG output pins. For detailed information on pin function switching, see the “I/O Ports (P)” chapter.
Oscillators
7.3
The S1C17554 CLG module contains two internal oscillator circuits (OSC3, and OSC1). The S1C17564 CLG mod-
ule contains three internal oscillator circuits (IOSC, OSC3, and OSC1). The OSC3 and IOSC oscillators generate
the main clock for high-speed operation of the S1C17 Core and peripheral circuits. The OSC1 oscillator generates
a sub-clock for timers and low-power operations. The OSC3 clock is selected as the system clock in the S1C17554
or the IOSC clock is selected in the S1C17564 after an initial reset. Oscillator on/off switching and system clock
selection (from IOSC, OSC3 and OSC1) are controlled with software.
3.1 Oscillator Configuration
Table 7.
Model
IOSC oscillator
OSC3 oscillator
OSC1 oscillator
Default system clock
S1C17554
Unavailable
Available
(Default: On)
Available
(Default: Off)
OSC3
S1C17564
Available
(Default: On)
Available
(Default: Off)
Available
(Default: Off)
IOSC
OSC3 Oscillator
7.3.1
The OSC3 oscillator is a high-precision, high-speed oscillator circuit that uses either a crystal resonator or a ceramic
resonator. Figure 7.3.1.1 shows the OSC3 oscillator configuration.
A crystal resonator (X’tal3) or a ceramic resonator (Ceramic) and a feedback resistor (Rf3) should be connected
between the OSC3 and OSC4 pins. Additionally, two capacitors (CG3 and CD3) should be connected between the
OSC3/OSC4 pins and VSS.
To use an external clock, leave the OSC4 pin open and input an LVDD-level clock (with a 50% duty cycle) to the
OSC3 pin.
For the effective frequency range, oscillation characteristics, and external clock input characteristics, see the “Elec-
trical Characteristics” chapter.