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5 INITIAL RESET
5-2
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
Initial Reset Sequence
5.2
Even if the #RESET pin input negates the reset signal after power is turned on, the CPU cannot boot up until the
oscillation stabilization waiting time(*), system clock internal supply start time (8 cycles), and Flash reset cancella-
tion time (16 cycles) have elapsed.
Figure 5.2.1 shows the operating sequence following cancellation of initial reset.
The CPU starts operating in synchronization with the OSC3 or IOSC (S1C17564 internal oscillator) clock(*) after
reset state is canceled.
Note: The oscillation stabilization time described in this section does not include oscillation start time.
Therefore the time interval until the CPU starts executing instructions after power is turned on or
SLEEP mode is canceled may be longer than that indicated in the figure below.
Boot vector
Oscillation stabilization
waiting time (
*)
System clock internal
supply start time
(8 cycles)
Flash reset
canceling time
(16 cycles)
Booting
OSC3/IOSC clock (
*)
System clock
#RESET
Internal reset
Internal data request
Internal data address
Internal reset canceled
Reset canceled
2.1 Operation Sequence Following Cancellation of Initial Reset
Figure 5.
* Booting clock and oscillation stabilization waiting time
S1C17554: Boots up with the OSC3 clock. The oscillation stabilization waiting time is configured to 1,024 cy-
cles (OSC3 clock).
S1C17564: Boots up with the IOSC clock. The oscillation stabilization waiting time is configured to 64 cycles
(IOSC clock).
Initial Settings After an Initial Reset
5.3
The CPU internal registers are initialized as follows at initial reset.
R0–R7: 0x0
PSR:
0x0 (interrupt level = 0, interrupt disabled)
SP:
0x0
PC:
Reset vector stored at the beginning of the vector table is loaded by the reset handling.
The internal RAM and display memory should be initialized with software as they are not initialized at initial reset.
The internal peripheral modules are initialized to the default values (except some undefined registers). Change the
settings with software if necessary. For the default values set at initial reset, see the list of I/O registers in Appendix
or descriptions for each peripheral module.