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11 16-BIT PWM TIMERS (T16A)
S1C17554/564 TECHNICAL MANUAL
Seiko Epson Corporation
11-1
16-bit PWM Timers (T16A)
11
T16A Module Overview
11.1
The S1C17554/564 includes a 16-bit PWM timer (T16A) module that consists of four channels of counter blocks
and comparator/capture blocks. This timer can be used as an interval timer, PWM waveform generator, external
event counter and a count capture unit to measure external event periods.
The features of T16A are listed below.
Four channels of 16-bit up counter blocks
Four channels of comparator/capture blocks to which a counter block to be connected is selectable.
Allows selection of a count clock asynchronously with the CPU clock.
Supports event counter function using an external clock.
The comparator compares the counter value with two specified comparison values to generate interrupts and a
PWM waveform.
The capture unit captures counter values using two external trigger signals and generates interrupts.
Figure 11.1.1 shows the T16A configuration.
A data register
T16A_CCA0
TOUT0
TOUT1
CAP0
CAP1
Interrupt
request
B data register
T16A_CCB0
Interrupt
control
TOUT
control
Comparator/
Capture controller
A data buffer
(T16A_CCA0)
B data buffer
(T16A_CCB0)
Counter block Ch.0
Comparator/capture block Ch.0
Counter block Ch.1
Comparator/capture block Ch.1
Counter
T16A_TC0
Count
control
IOSC
OSC1
EXCL0
Divider
(1/1–1/16384)
OSC3
Divider
(1/1–1/16384)
TOUT6/7
CAP6/7
Interrupt
request
TOUT4/5
CAP4/5
Interrupt
request
TOUT2/3
CAP2/3
Interrupt
request
EXCL1
EXCL2
EXCL3
Divider
(1/1–1/256)
Gate
Clock controller Ch.0
Clock controller Ch.1
16-bit PWM timer
Counter block Ch.2
Comparator/capture block Ch.2
Clock controller Ch.2
Counter block Ch.3
Comparator/capture block Ch.3
Clock controller Ch.3
S1C17564
1.1 T16A Configuration
Figure 11.
Clock controller
T16A includes four channels of clock controllers that generate the count clock for the counters. The clock
source and division ratio can be selected with software.
Counter block
The counter block includes a 16-bit up-counter that operates with an IOSC (S1C17564 only), OSC3, or OSC1
division clock, or the external count clock input from outside the IC. The T16A module allows software to run
and stop the counter of each channel, and to reset the counter value (cleared to 0) as well as selection of the
count clock. The counter can also be reset by the compare B signal output from the comparator/capture block.