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Section 8 Direct Memory Access Controller (DMAC)
The SH7410 processor includes a four-channel direct memory access controller (DMAC). The
DMAC can be used in place of the CPU to perform high-speed transfers between external devices
with DACK (transfer request received signal), external memory, memory mapped external
devices, on-chip memory and on-chip peripheral modules (excluding the BSC, SYSC, and
DMAC). Using the DMAC reduces the burden on the CPU and increases overall operating
efficiency.
8.1
Overview
The DMAC has the following features:
Four channels
Four Gbytes of architectural address space
Selectable byte or word transfer unit
Up to 65,536 data transfers per DMAC request
Single-address mode transfers (channels 0–1): Either the source or destination of the
transferring peripheral device (selectable) is accessed by a DACK signal, while the other is
accessed by address. The transfer of one unit of data requires one bus cycle.
Supports transfers between:
An external device with a DACK pin and a memory-mapped external device
An external device with a DACK pin and external memory
Dual-address mode transfer: (channels 0–3): Both the source and destination of the transfer are
accessed by address. The transfer of one unit of data requires two bus cycles.
Supports transfers between:
Two external memories
External memory and a memory-mapped external device
Two external memory-mapped devices
External memory and on-chip memory
External memory and an on-chip peripheral module (excluding the BSC, SYSC, and the
DMAC itself)
A memory-mapped external device and on-chip memory
A memory-mapped external device and an on-chip peripheral module (excluding the BSC,
SYSC, and the DMAC)
Two on-chip memories
On-chip memory and an on-chip peripheral module (excluding the BSC, SYSC, and the
DMAC)
Two on-chip peripheral modules (excluding the BSC, SYSC, and the DMAC)