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8.3.2
DMA-Transfer Requests
DMA-transfer requests are normally generated by either the data transfer source or destination, but
they can also be generated by devices that are neither the source nor the destination. Transfers can
be requested in three modes: auto-request, external request, and on-chip peripheral module
request. The request mode is selected by the RS3–RS0 bits in the DMA channel control register
(DCHCR).
Auto-Request Mode: When there is no transfer request signal from an external source, as in a
memory-to-memory transfer or a transfer between memory and an on-chip peripheral module
unable to request a transfer, the auto-request mode allows the DMAC to automatically generate a
transfer request signal internally. When the DE bit in DCHCR and the DME bit in DMAOR are
both set to 1, the transfer begins (so long as the corresponding TE bit in DCHCR and the NMIF
and AE bits of DMAOR are cleared to 0).
External Request Mode: In this mode, a transfer is performed at the request signal (
DREQ) of an
external device. Table 8.3 lists the available modes. When this mode is selected, if the DMA
transfer is enabled (DE = 1, DME = 1, TE = 0, NMIF = 0, AE = 0), a transfer is performed
whenever a request is signaled by the assertion of the
DREQ input. The DS bit in DCHCR
determines whether
DREQ is detected by the falling edge or low level of the signal input (DS = 0
is level detection, DS = 1 is edge detection). Although the source or destination of the transfer may
generate the transfer request, the request may also be generated by a different device.
Table 8.3
Selecting External Request Modes with the RS3–RS0 Bits
RS3
RS2
RS1
RS0
Address Mode
Source
Destination
0000
Dual
Any*
0010
Single
External memory or
memory-mapped
external device
External device with a
DACK pin
0011
Single
External device with
a DACK pin
External memory or
memory-mapped
external device
Note:
External memory, memory-mapped external device, on-chip memory, or on-chip peripheral
module (excluding DMAC, BSC, SYSC, and UBC)
On-Chip Peripheral Module Request Mode: In this mode, a transfer is performed at the transfer
request signal (interrupt request signal) of an on-chip peripheral module. The transfer request
signals include the receive-data-full interrupt (RXI) of the serial communication interface (SCI),
the transmit-data-empty interrupt (TXI) of the SCI, the receive-data-full interrupt (RDFI) of the
serial interface (SIO), the transmit-data-empty interrupt (TDEI) of the SIO (table 8.4). When this
mode is selected, if the DMA transfer is enabled (DE = 1, DME = 1, TE = 0, NMIF = 0, AE = 0),
the DMAC performs a transfer upon the input of a transfer request signal. The types of transfer
destinations indicated below must be designated by the selected transfer request signals. When