参数资料
型号: IPR-POSPHY4
厂商: Altera
文件页数: 85/144页
文件大小: 0K
描述: IP POS-PHY L4 RENEW
标准包装: 1
系列: *
类型: MegaCore
功能: POS-PHY 4 级接口,链路层/物理层
许可证: 续用许可证
Chapter 5: Functional Description—Transmitter
5–13
Error Flagging and Handling
The stat_ts_sync signal is deasserted when a programmed bad_level number of
calendar sequences with frame errors or DIP-2 errors is received without a good
frame. When the stat_ts_sync signal is deasserted, the transmitter stops transmitting
data on the nearest burst unit size boundary or at the next EOP, and starts sending the
training patterns continuously (refer to Figure 5–6 ).
Figure 5–6. Status Sync State Machine
May 2013
Altera Corporation
POS-PHY Level 4 MegaCore Function User Guide
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IPR-RAPIDIOII 功能描述:开发软件 RapidIO 1x/2x/4x MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPR-RIOPHY 功能描述:开发软件 RapidIO MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
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IPR-RLDRAMII 功能描述:开发软件 RLDRAM II Controller MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors