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| 型号： | M66596WG |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA64 |
| 封装： | 0.80 MM PITCH, FBGA-64 |
| 文件页数： | 107/133页 |
| 文件大小： | 1611K |
| 代理商： | M66596WG |
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M66596FP/WG
rev .1.00
2006.3.14
page 73 of 127
3.3.1 Transfer types
The TYPE bit of the PIPEPCFG register is used to specify the type of transfer for the various pipes. The types of
transfer that can be set for the pipes are noted below.
DCP: No setting is necessary (fixed at control transfer).
PIPE1-2: These should be set to bulk transfer or isochronous transfer.
PIPE3-5: These should be set to bulk transfer.
PIPE6-7: These should be set to interrupt transfer.
3.3.2 End point number
The EPNUM bit of the PIPEPCFG register is used to set the end point numbers for the various pipes. DCP is fixed
at end point 0. The other pipes can be set from end point 1 to end point 15.
DCP: No setting is necessary (fixed at end point 0).
PIPE1-7: “1” to “15” should be selected and set.
However, these should be set so that the combination of the DIR bit and the EPNUM bit is a unique combination.
3.3.3 Maximum packet size setting
The MXPS bit of the DCPMAXP register and the PIPEMAXP register is used to set the maximum packet size for
the various pipes. DCP and PIPE1-5 can be set to any of the maximum pipe sizes defined by USB specification. For
PIPE6-7, 64 bytes is the upper limit for the maximum packet size. The maximum packet size should be set before
beginning the transfer (“PID=BUF”).
DCP: “64” should be set when using Hi-Speed operation.
DCP: Select and set “8”, “16”, “32” or “64” when using Full-Speed operation.
PIPE1-5: “0” or “512” should be set when using Hi-Speed bulk transfer.
PIPE1-5: Select and set “0”, “8”, “16”, “32” or “64” when using Full-Speed bulk transfer.
PIPE1-2: Set a value between “1” and “1024” when using Hi-Speed isochronous transfer.
PIPE1-2: Set a value between “1” and “1023” when using Full-Speed isochronous transfer.
PIPE6-7: Set a value between “1” and “64”.
*The High-Bandwidth transfers used with interrupt transfers and isochronous transfers are not supported.
Also, setting “MXPS=0” for pipes when bulk transfer is being used results in the following operations in the
Peripheral mode. In the Host mode do not set "MAXP=0".
(1)
Bulk IN: Data cannot be written to the buffer memory.
When “PID=BUF” is set, a Zero-Length packet is sent in response to an IN token.
The BRDY, NRDY, and BEMP interrupts are not generated.
(2)
Bulk OUT: The data in the received data packets cannot be stored in the buffer memory.
When “PID=BUF” is set, the NAK response is sent in response to an OUT token.
In this case, NRDY interrupts are generated, but BRDY and BEMP interrupts are not.
3.3.4 Response PID
The PID bit of the DCPCTR register and PIPExCTR register is used to set the response PID for each pipe.
(1)
Host mode
(a)
Response PID specifies execution of a transaction.NAK setting : A pipe is in a prohibition state. A
transaction is not executed.
(b)
BUF setting
: A transaction is executed based on the status of the buffer memory.
(c)
STALL setting : A pipe is in a prohibition state. A transaction is not executed.
* The setup transaction of DCP is executed by operation of a SUREQ bit.
(2)
Peripheral mode
Response PID specifies the response to the transaction from a host.
(a) NAK setting
: The “NAK response” is always returned in response to the generated transaction.
(b) BUF setting
: Responses are made to transactions based on the status of the buffer memory.
(c)
STALL setting : The “STALL” response is always returned in response to the generated transaction.
* For setup transactions, an “ACK response” is always returned, regardless of the PID setting, and the USB
request is stored in the register.
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