参数资料
型号: M66596WG
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封装: 0.80 MM PITCH, FBGA-64
文件页数: 59/133页
文件大小: 1611K
代理商: M66596WG
M66596FP/WG
rev .1.00
2006.3.14
page 29 of 127
D0 transaction counter register [D0FIFOTRN]
<Address: 28H>
D1 transaction counter register [D1FIFOTRN]
<Address: 2EH>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TRNCNT
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
Bit
Name
Function
S/W
H/W
Note
15-0 TRNCNT
Transaction counter
Writing: Sets the number of DMA transfer
transactions.
Reading: Reads the number of transactions.
R/W
R
<<Note>>
*13) The transaction counter is valid when data is being read from the buffer memory.
The number of transactions can be read while counting is taking place only if the TRENB bit of the DxFIFOSEL
register is “1”. If “TRENB=0”, the set number of transactions can be read.
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