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| 型号： | M66596WG |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA64 |
| 封装： | 0.80 MM PITCH, FBGA-64 |
| 文件页数： | 114/133页 |
| 文件大小： | 1611K |
| 代理商： | M66596WG |
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M66596FP/WG
rev .1.00
2006.3.14
page 79 of 127
3.4.1.6 Buffer memory operation (continuous transfer setting)
Either the continuous transfer mode or the non-continuous transfer mode can be selected, using the CNTMD
bit of the DCPCFG register and the PIPExCFG register. This selection is valid for pipes 0-5.
The continuous transfer mode function is a function that sends and receives multiple transactions in succession.
When the continuous transfer mode is set, data can be transferred without interrupts being issued to the CPU,
up to the buffer sizes assigned for each of the pipes.
In the continuous sending mode, the data being written is divided into packets of the maximum packet size
and sent. If the data being sent is less than the buffer size (short packet, or the integer multiple of the maximum
packet size is less than the buffer size), “BVAL=1” must be set after the data being sent has been written.
In the continuous reception mode, interrupts are not issued during reception of packets up to the buffer size,
until the transaction counter has ended, or until a short packet is received.
Figure 3.21 shows an example of buffer memory operation for the controller.
Max Packet Size
Not used area
CNTMD=0
When packet is received
Max Packet Size
CNTMD=1
When packet is received
Interrupt issued
Max Packet Size
Not used area
CNTMD=0
When packet is sent
Max Packet Size
CNTMD=1
When packet is sent
Sending enabled
Figure 3.21 Example of buffer memory operation
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