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参数资料
| 型号： | CORE10/100-RM |
| 厂商： | Microsemi SoC |
| 文件页数： | 52/106页 |
| 文件大小： | 0K |
| 描述： | IP CORE10/100 ETHERNET MAC |
| 标准包装： | 1 |
| 系列： | * |
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Software Interface
Core10100 v4.0
Descriptor fetch
Descriptor closing
Data transfer from receive FIFO to host buffer
The key task for the DMA is to perform an arbitration between the receive and transmit processes. Two arbitration
schemes are possible according to the CSR0.1 bit:
? 1 – Round-robin arbitration scheme in which receive and transmit processes have equal priorities
? 0 – The receive process has priority over the transmit process unless transmission is in progress. In this case, the
following rules apply:
The transmit process request should be serviced by the DMA between two consecutive receive transfers.
The receive process request should be serviced by the DMA between two consecutive transmit transfers.
Transfers between the host and Core10100 performed by the DMA component are either single data transfers or burst
transfers. For the data descriptors, the data transfer size depends on the core parameter DATAWIDTH. The rule is that
every descriptor field (32-bit) is accessed with a single burst. For DATAWIDTH = 32, the descriptors are accessed with
a single transaction; for DATAWIDTH = 16, the descriptors are accessed with a burst of two 16-bit words, and for
DATAWIDTH = 8, the descriptors are accessed with a burst of four 8-bit words.
In the case of data buffers, the burst length is defined by CSR0.(13..8) (programmable burst length) and can be set to 0,
1, 2, 4, 8, 16, or 32. When set to 0, no maximum burst size is defined, and the transfer ends when the transmit FIFOs
are full or the receive FIFOs are empty.
Transmit Process
The transmit process can operate in one of three modes: running, stopped, or suspended. After a software or hardware
reset, or after a stop transmit command, the transmit process is in a stopped state. The transmit process can leave a
stopped state only after the start transmit command.
When in a running state, the transmit process performs descriptor/buffer processing. When operating in a suspended or
stopped state, the transmit process retains the position of the next descriptor, i.e., the address of the descriptor following
the last descriptor being closed. After entering a running state, that position is used for the next descriptor fetch. The
only exception is when the host writes the transmit descriptor base address register (CSR4). In that case, the descriptor
address is reset and the fetch is directed to the first position in the list. Before writing to CSR4 the MAC must be in a
stopped state.
When operating in a stopped state, the transmit process stopped (tps) output is HIGH. This output can be used to
disable the clkt clock signal external to Core10100. When both the tps and receive process stopped (rps) outputs are
HIGH, all clock signals except clkcsr can be disabled external to Core10100.
The transmit process remains running until one of the following events occurs:
? The hardware or software reset is issued. Setting the CSR0.0 (SWR) bit can perform the software reset. After the reset,
all the internal registers return to their default states. The current descriptor's position in the transmit descriptor list is
lost.
? A stop transmit command is issued by the host. This can be performed by writing 0 to the CSR6.13 (ST) bit. The
current descriptor's position is retained.
? The descriptor owned by the host is found. The current descriptor's position is retained.
? The transmit FIFO underflow error is detected. An underflow error is generated when the transmit FIFO is empty
during the transmission of the frame. When it occurs, the transmit process enters a suspended state. Transmit
automatic polling is internally disabled, even if it is enabled by the host by writing the TAP bits. The current
descriptor's position is retained.
Leaving a suspended state is possible in one of the following situations:
? A transmit poll demand command is issued. This can be performed by writing CSR1 with a nonzero value. The
transmit poll demand command can also be generated automatically when transmit automatic polling is enabled.
52
v4.0
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