参数资料
型号: IP-POSPHY4
厂商: Altera
文件页数: 55/144页
文件大小: 0K
描述: IP POS-PHY L4
标准包装: 1
系列: *
类型: MegaCore
功能: POS-PHY 4 级接口,链路层/物理层
许可证: 初始许可证
Chapter 4: Functional Description—Receiver
Error Flagging and Handling
Table 4–3. SPI-4.2 Protocol Error Handling (Part 2 of 3) (Note 1) , (2)
4–15
Error
Condition
Response
Reserved control words:
Ignore reserved control words.
Reserved control word
Reserved control word 0 ( RSV0 ) = CTL and
DAT[15:12] == 4’b0101
Reserved control word 1 ( RSV1 ) =
CTL and DAT[15:12] == 4’b0011
Extension control ( EXT ) =
CTL and DAT[15:12] == 4’b0001
End of control word extension ( EOE ) = CTL and
Assert the stat_rd_rsv_cw for
notification purposes.
The payload following the
reserved control word is not
written into the FIFO buffer.
DAT[15:12] == 4’b0111
Reserved control words are identified by the assertion of
the stat_rd_rsv_cw signal, which pulses high for a
single rdint_clk clock cycle when a reserved control
word is detected.The payload following the reserved
control word is not written into any buffer.
Assert err_rd_dip4 for one
clock cycle.
As part of the SPI-4.2 protocol control word content, the 4-
bit diagonal interleaved parity (DIP-4) is computed over the
Optionally mark some or all open
packets with an Atlantic error.
Single DIP-4 error
current control word and preceding data. A DIP-4 error
occurs when the DIP-4 calculated over the rdat line does
not match the DIP-4 value in the control word.
(Including packets with DIP-4
error at SOP). The packets have
aN_arxerr asserted (high).
May 2013
Altera Corporation
POS-PHY Level 4 MegaCore Function User Guide
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