参数资料
型号: IP-POSPHY4
厂商: Altera
文件页数: 76/144页
文件大小: 0K
描述: IP POS-PHY L4
标准包装: 1
系列: *
类型: MegaCore
功能: POS-PHY 4 级接口,链路层/物理层
许可证: 初始许可证
5–4
Chapter 5: Functional Description—Transmitter
Block Description
Whenever a port is not selected, or exhausts its credit-counter register, the contents of
the next-credits holding register are loaded into the credit-counter register, and the
next-credits register is cleared. The next-credits register remains at zero until the next
status update is received.
As data is transmitted for a selected port, the credit-counter register is decreased. If
the credit counter ever has insufficient credits for an entire burst unit size transfer, the
scheduler switches to another port. This port cannot send again until the credits-
counter register is reloaded with the contents of the next-credits holding register.
Therefore, the MaxBurst1 and MaxBurst2 values must be greater than or equal to the
burst unit size value.
If the buffer runs out of data before the credit-counter register reaches zero, the
scheduler switches to another port. The leftover credits remain available until a new
status message causes the credit counter to be overwritten with fresh credits. The port
may be selected again before the next status update if the buffers fill again.
Both the next-credits and credits-counter tables are cleared when a loss of status sync
(LOSS) occurs, resuming to normal behavior when the LOSS is cleared.
The scheduler normally switches when the credits are exhausted or the port runs out
of data. If the scheduler switch on EOP feature is turned on, the scheduler also
switches to another port when an EOP is sent.
Data Processor (tx_data_proc)
The data processor consists of two sub-blocks.
Atlantic Conversion
This block packs the data from the Atlantic interface into SPI-4.2 format.
Normally, this block enables data to be transferred from the transmit scheduler to the
Atlantic FIFO buffer. If ignore backpressure is disabled, a satisfied status for any port
causes the enable to drop at the next burst unit size boundary and data is not
transferred. This backpressure mechanism is described in “Shared Buffer with
1
The MegaCore function cannot force insertion of control words except when the
address changes or there is insufficient data to send, regardless of the buffer type.
Control Word Insertion, DIP-4, and Training Pattern Insertion
This block inserts control words into the data path, and performs DIP-4 calculation
and insertion.
An EOP-abort condition can be generated on the SPI-4.2 interface by asserting
aN_atxerr with a valid aN_atxeop on the Atlantic interface. This condition is the only
one for which the EOP-abort bit is set in the transmitted control word.
This block also inserts the training pattern at the interval defined by the Maximum
Training Sequence Interval parameter (MaxT). If the status channel is receiving a
continuous framing pattern on the status channel, the MegaCore function sends
training patterns continuously.
POS-PHY Level 4 MegaCore Function User Guide
May 2013 Altera Corporation
相关PDF资料
PDF描述
IP-RIOPHY IP RAPID I/O
IP-RLDRAMII IP RLDRAM II CONTROLLER
IP-RSDEC IP REED-SOLOMON DECODER
IP-SDI IP VIDEO INTERFACE - SDI
IP-SDRAM/DDR2 IP DDR2 SDRAM CONTROLLER
相关代理商/技术参数
参数描述
IPPS054193X 功能描述:保险丝 800A 1000V 3GKN/75 RoHS:否 制造商:Littelfuse 产品:Surface Mount Fuses 电流额定值:0.5 A 电压额定值:600 V 保险丝类型:Fast Acting 保险丝大小/组:Nano 尺寸:12.1 mm L x 4.5 mm W 安装风格: 端接类型:SMD/SMT 系列:485
IP-QDRII/UNI 功能描述:开发软件 QDRII SRAM Control MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPR-100GEMAC 功能描述:开发软件 100G Ethernet Mac MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPR-100GEMACPHY 功能描述:开发软件 100 Gb Ethernet MAC PHY MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPR-100GEPHY 功能描述:开发软件 100G Ethernet Phy MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors