参数资料
型号: SIS600
厂商: SILICON INTEGRATED SYSTEMS CORP
元件分类: 外设及接口
英文描述: MULTIFUNCTION PERIPHERAL, PBGA487
封装: BGA-487
文件页数: 128/144页
文件大小: 1592K
代理商: SIS600
SiS600 Pentium II PCI /A.G.P. Chipset
Preliminary V1.0 Jan. 25, 1999
81
Silicon Integrated Systems Corporation
8.1.4.
POWER MANAGEMENT
Register 68h~69h ACPI I/O Space Base Address Register
Default Value:
0000h
Access:
Read/Write
BIT
ACCESS
DESCRIPTION
15:5
R/W
A[15:5] for ACPI I/O Space base Address
This register specifies A[15:5] of the starting address of the ACPI I/O space.
4:3
R/W
Reserved
2
R/W
A.G.P. Request Enable
This bit controls the A.G.P. request during ACPI cycles. When disabled, no A.G.P.
request is acceptable during ACPI cycles.
0: Disable
1: Enable
1
R/W
Reserved
0
R/W
Validity Bit
When set to 1, the base address contain in Bit[15:5] in valid. Otherwise the base
address defined in Bit[15:5] is ignored.
0: Invalid
1: Valid
Register 6Ah
SMRAM Access Control Register
Default Value:
00h
Access:
Read/Write
BIT
ACCESS
DESCRIPTION
7:6
R/W
SMRAM Area Re-mapping Control
This field controls how the address in the host bus is mapped to the system memory
address when the SMARM access control bit is enabled or CPU is in the system
management mode.
Bits[7:6]
Host AddressSystem Memory Address
00
E0000h~E7FFFh
E0000h~E7FFFh (32K)
01
E0000h~E7FFFh
A0000h~A7FFFh (32K)
10
E0000h~E7FFFh
B0000h~B7FFFh (32K)
11
A0000h~AFFFFh
A0000h~AFFFFh (64K)
5
R/W
Reserved
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