参数资料
型号: SIS600
厂商: SILICON INTEGRATED SYSTEMS CORP
元件分类: 外设及接口
英文描述: MULTIFUNCTION PERIPHERAL, PBGA487
封装: BGA-487
文件页数: 144/144页
文件大小: 1592K
代理商: SIS600
SiS600 Pentium II PCI A.G.P. Chipset
Preliminary V1.0 Jan. 25, 1999
96
Silicon Integrated Systems Corporation
8.1.10. CPU/PCI CLOCKS DLL CONTROL REGISTERS
Register 8Ch
DLL Control
Default Value:
00h
Access:
Read/Write
DLL is used to minimize the clock skew between internal and external clocks. This register controls the time
period that DLL circuit locks the reference clock again. This register applies to CPU clock and PCI clock.
BIT
ACCESS
DESCRIPTION
7:6
R/W
DLL Lock Period Control
This field controls the period that DLL adjust the internal clock to the reference
clock source.
Bit[7:6] Period
00
4T
01
8T
10
16T
11
32T
T is the reference clock source for DLL.
5:3
R/W
Reserved
2
R/W
Test bit for internal clock
0: Normal Mode
1: Test Mode
1
R/W
Test bit for DRAM clock
0: Normal Mode
1: Test Mode
5:0
R/W
Test bit for PCI DLL function
0: Normal Mode
1: Test Mode
Register 8D
Timing Control for DRAM Controller
Default Value:
62h
Access:
Read/Write
BIT
ACCESS
DESCRIPTION
7
R/W
Reserved
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