参数资料
型号: SIS600
厂商: SILICON INTEGRATED SYSTEMS CORP
元件分类: 外设及接口
英文描述: MULTIFUNCTION PERIPHERAL, PBGA487
封装: BGA-487
文件页数: 129/144页
文件大小: 1592K
代理商: SIS600
SiS600 Pentium II PCI /A.G.P. Chipset
Preliminary V1.0 Jan. 25, 1999
82
Silicon Integrated Systems Corporation
4
R/W
SMRAM Access Control
When enabled, SMRAM area can be accessed without asserting SMIACT#. This
function is useful for BIOS to initialize SMRAM. When disabled, SMRAM area
can only be accessed during the SMI handler.
0: Disable
1: Enable
3:0
R/W
Reserved
Register 6Bh
System Event Monitor Control for Power Management
Default Value:
00h
Access:
Read/Write
BIT
ACCESS
DESCRIPTION
7
R/W
Monitoring A.G.P. I/O Access
When enabled, CPU-to-AGP I/O accesses fall within the range defined by base
address register will be reported to the SiS5595 via BM_REQ# .
0: Disable
1: Enable
6
R/W
Monitoring A.G.P. Non-prefetchable Memory Access
When enabled, CPU-to-AGP memory accesses fall within the non-prefetchable
memory area will be reported to the SiS5595 via BM_REQ#.
0: Disable
1: Enable
5
R/W
Monitoring A.G.P. Prefetchable Memory Access
When enabled, CPU-to-AGP memory accesses fall within the prefetchable memory
area will be reported to the SiS5595 via BM_REQ#.
0: Disable
1: Enable
4
R/W
Monitoring VGA Compatible IO Access toward A.G.P.
When enabled, I/O accesses fall within VGA compatible I/O addresses (3B0h ~
3BBh, 3C0 ~ 3DFh) toward AGP will be reported to the SiS5595 via BM_REQ#.
0: Disable
1: Enable
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