参数资料
型号: IPR-SLITE2
厂商: Altera
文件页数: 28/110页
文件大小: 0K
描述: IP SERIALLITE II RENEW
标准包装: 1
系列: *
类型: MegaCore
功能: SerialLite II 协议
许可证: 续用许可证
Chapter 3: Parameter Settings
Physical Layer Configuration
Figure 3–3. Streaming Symmetric Mode Block Diagram
3–5
FPGA 1
One or more lanes
( u p to N)
FPGA 2
Atlantic
Interface
PHY
Layer
CDR
SERDES
CDR
SERDES
PHY
Layer
Atlantic
Interface
One or more lanes
( u p to N)
Notes to Figure 3–3 :
(1) A full line indicates a mandatory lane.
(2) A dashed line indicates an optional lane.
Figure 3–4. Simplex Mode Block Diagram
FPGA 1
One lane only
FPGA 2
Atlantic
Interface
Light-weight
Linklayer
PHY
Layer
CDR
SERDES
CDR
SERDES
PHY
Layer
Light-weight
Linklayer
Atlantic
Interface
Note to Figure 3–4 :
(1) A full line indicates a mandatory lane.
January 2014
Altera Corporation
SerialLite II MegaCore Function
User Guide
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